Martin, Alain

Combined from CaltechTHESIS advisor

• Keller, Sean Jason (2014) Robust Near-Threshold QDI Circuit Analysis and Design; 10.7907/79EJ-Q945
• Chang, Xiaofei (2014) Resetting Asynchronous QDI Systems; 10.7907/RNGK-RV18
• Jang, Wonjin (2008) Soft-Error Tolerant Quasi Delay-insensitive Circuits; 10.7907/ZVFF-WE07
• Prakash, Piyush (2008) Throughput Optimization of Quasi Delay Insensitive Circuits via Slack Matching; 10.7907/9HMY-RR92
• Papadantonakis, Karl Spyros (2006) Rigorous Analog Verification of Asynchronous Circuits; 10.7907/4R8F-WF03
• Prakash, Piyush (2005) Slack Matching; 10.7907/g43p-hv51
• Wong, Catherine Grace (2004) High-Level Synthesis and Rapid Prototyping of Asynchronous VLSI Systems; 10.7907/5N2N-0W58
• Papadantonakis, Karl Spyros (2002) What is "Deterministic CHP", and is "Slack Elasticity" That Useful?; 10.7907/PCCK-CS43
• Pénzes, Paul Ivan (2002) Energy-Delay Complexity of Asynchronous Circuits; 10.7907/9jpj-5s67
• Ginis, Roman (2002) Automating Resource Management for Distributed Business Processes; 10.7907/9GXT-BD03
• Nyström, Mika (2001) Asynchronous Pulse Logic; 10.7907/B107-MW15
• Manohar, Rajit (1999) The impact of asynchrony on computer architecture; 10.7907/xzwa-p598
• Van der Goot, Marcel Rene (1995) Semantics of VLSI synthesis; 10.7907/SR5V-KT18
• Lee, Tak Kwan (1995) A General Approach to Performance Analysis and Optimization of Asynchronous Circuits; 10.7907/ehzs-y537
• Tierno, Jose Andres (1995) An energy-complexity model for VLSI computations; 10.7907/PP38-4935
• Hazewindus, Pieter Johannes (1992) Testing delay-insensitive circuits; 10.7907/0d7v-9d09
• Burns, Steven Morgan (1991) Performance analysis and optimization of asynchronous circuits; 10.7907/kez1-7q52
• Burch, Jerry R. (1988) A Comparison of Strict and Non-Strict Semantics for Lists; 10.7907/01bb-3j05
• Li, Peyyun Peggy (1986) A Parallel Execution Model for Logic Programming; 10.7907/2ngs-bp80