[
    {
        "id": "authors:hay6n-xjs97",
        "collection": "authors",
        "collection_id": "hay6n-xjs97",
        "cite_using_url": "https://resolver.caltech.edu/CaltechAUTHORS:PEDel96",
        "type": "article",
        "title": "Single-clock-cycle two-dimensional median filter",
        "author": [
            {
                "family_name": "Pedroni",
                "given_name": "V. A.",
                "clpid": "Pedroni-V-A"
            },
            {
                "family_name": "Yariv",
                "given_name": "A.",
                "clpid": "Yariv-A"
            }
        ],
        "abstract": "Median filters are of interest to image processing due to their ability to remove impulsive noise. Conventional digital implementations of the median function, however, require multiple clock cycles, a number that is proportional to the size of the 2-D data block. We present in the Letter a complete CMOS implementation, which consumes very little power and computes the median in just one clock cycle, independently from the size of the data block.",
        "issn": "0013-5194",
        "publisher": "Electronics Letters",
        "publication": "Electronics Letters",
        "publication_date": "1996-02-29",
        "series_number": "5",
        "volume": "32",
        "issue": "5",
        "pages": "440-441"
    }
]