<h1>Minch, Bradley Arthur</h1>
<h2>Article from <a href="https://authors.library.caltech.edu">CaltechAUTHORS</a></h2>
<ul>
<li>Hasler, Paul and Andreou, Andreas G., el al. (1998) <a href="https://resolver.caltech.edu/CaltechAUTHORS:HASvd98">Impact Ionization and Hot-Electron Injection Derived Consistently from Boltzmann Transport</a>; VLSI Design; Vol. 8; No. 1-4; 455-461; <a href="https://doi.org/10.1155/1998/73698">10.1155/1998/73698</a></li>
<li>Diorio, Chris and Hasler, Paul, el al. (1997) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20150113-162250820">A floating-gate MOS learning array with locally computed weight updates</a>; IEEE Transactions on Electron Devices; Vol. 44; No. 12; 2281-2289; <a href="https://doi.org/10.1109/16.644652">10.1109/16.644652</a></li>
<li>Diorio, Chris and Hasler, Paul, el al. (1997) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20150127-165006071">A Complementary Pair of Four-Terminal Silicon Synapses</a>; Analog Integrated Circuits and Signal Processing; Vol. 13; No. 1-2; 153-166; <a href="https://doi.org/10.1023/A:1008244314595">10.1023/A:1008244314595</a></li>
<li>Diorio, Chris and Hasler, Paul, el al. (1996) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20150113-160500726">A single-transistor silicon synapse</a>; IEEE Transactions on Electron Devices; Vol. 43; No. 11; 1972-1980; <a href="https://doi.org/10.1109/16.543035">10.1109/16.543035</a></li>
<li>Minch, Bradley A. and Diorio, Chris, el al. (1996) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20141222-163230369">Translinear Circuits Using Subthreshold Floating-Gate MOS Transistors</a>; Analog Integrated Circuits and Signal Processing; Vol. 9; No. 2; 167-179; <a href="https://doi.org/10.1007/BF00166412">10.1007/BF00166412</a></li>
</ul>