<h1>Martin, Alain</h1>
<h2>Monograph from <a href="https://authors.library.caltech.edu">CaltechAUTHORS</a></h2>
<ul>
<li>Martin, Alain J. (2014) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20140206-111915844">25 Years Ago: The First Asynchronous Microprocessor</a>; <a href="https://doi.org/10.7907/Z9QR4V3H">10.7907/Z9QR4V3H</a></li>
<li>Keller, Sean and Bhargav, Siddharth S., el al. (2014) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20141125-133400175">Quantifying Near-Threshold CMOS Circuit Robustness</a>; <a href="https://doi.org/10.7907/Z9M043CG">10.7907/Z9M043CG</a></li>
<li>Wong, Catherine G. and Martin, Alain J., el al. (2003) <a href="https://resolver.caltech.edu/CaltechCSTR:2003.006a">An Architecture for Asynchronous FPGAs</a></li>
<li>Wong, Catherine G. and Martin, Alain J., el al. (2003) <a href="https://resolver.caltech.edu/CaltechCSTR:2003.006">An Architecture for Asynchronous FPGAs</a>; <a href="https://doi.org/10.7907/Z9X9288B">10.7907/Z9X9288B</a></li>
<li>Pénzes, Paul I. and Nyströem, Mika, el al. (2002) <a href="https://resolver.caltech.edu/CaltechCSTR:2002.003">Transistor Sizing of Energy-Delay-Efficient Circuits</a>; <a href="https://doi.org/10.7907/Z9ZG6Q7T">10.7907/Z9ZG6Q7T</a></li>
<li>Martin, Alain J. and Nyström, Mika, el al. (2001) <a href="https://resolver.caltech.edu/CaltechCSTR:2001.012">Speed and Energy Performance of an Asynchronous MIPS R3000 Microprocessor</a>; <a href="https://doi.org/10.7907/Z99S1P11">10.7907/Z99S1P11</a></li>
<li>Martin, Alain J. and Nyströem, Mika, el al. (2001) <a href="https://resolver.caltech.edu/CaltechCSTR:2001.007">ET^2: A Metric For Time and Energy Efficiency of Computation</a>; <a href="https://doi.org/10.7907/Z9K935JZ">10.7907/Z9K935JZ</a></li>
<li>Pénzes, Paul I. and Martin, Alain J. (2001) <a href="https://resolver.caltech.edu/CaltechCSTR:2002.002">Global and local properties of asynchronous circuits optimized for energy efficiency</a>; <a href="https://doi.org/10.7907/Z9FJ2DSS">10.7907/Z9FJ2DSS</a></li>
<li>Manohar, Rajit and Martin, Alain J. (1995) <a href="https://resolver.caltech.edu/CaltechCSTR:1995.cs-tr-95-11">Quasi-Delay-Insensitive Circuits are Turing-Complete</a>; <a href="https://doi.org/10.7907/Z9H70CV1">10.7907/Z9H70CV1</a></li>
<li>Tierno, Jose A. and Martin, Alain J. (1994) <a href="https://resolver.caltech.edu/CaltechCSTR:1994.cs-tr-94-21">Low-Energy Asynchronous Memory Design</a>; <a href="https://doi.org/10.7907/Z9X9289S">10.7907/Z9X9289S</a></li>
<li>Seitz, Charles L. and Martin, Alain J., el al. (1993) <a href="https://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-37">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/Z9NS0RX7">10.7907/Z9NS0RX7</a></li>
<li>Seitz, Charles L. and Martin, Alain J., el al. (1993) <a href="https://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-10">Submicron Systems Architecture</a>; <a href="https://doi.org/10.7907/4fh9g-yr824">10.7907/4fh9g-yr824</a></li>
<li>Tierno, Jose A. and Martin, Alain J., el al. (1993) <a href="https://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-38">An Asynchronous Microprocessor in Gallium Arsenide</a>; <a href="https://doi.org/10.7907/Z9BC3WJ5">10.7907/Z9BC3WJ5</a></li>
<li>Martin, Alain J. (1993) <a href="https://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-26">Tomorrow's Digital Hardware will be Asynchronous and Verified</a>; <a href="https://doi.org/10.7907/Z9125QPR">10.7907/Z9125QPR</a></li>
<li>Seitz, Charles L. and Martin, Alain J., el al. (1992) <a href="https://resolver.caltech.edu/CaltechCSTR:1992.cs-tr-92-17">Submicron Systems Architecture Project : Semiannual Technical Report, 1 July 1992</a>; <a href="https://doi.org/10.7907/Z9WS8RF5">10.7907/Z9WS8RF5</a></li>
<li>Nielsen, Christian D. and Martin, Alain J. (1992) <a href="https://resolver.caltech.edu/CaltechCSTR:1992.cs-tr-92-03">Delay-Insensitive Multiply-Accumulate Unit</a>; <a href="https://doi.org/10.7907/Z9MG7MPP">10.7907/Z9MG7MPP</a></li>
<li>Martin, Alain J. (1991) <a href="https://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-91-08">Asynchronous Datapaths and the Design of an Asynchronous Adder</a>; <a href="https://doi.org/10.7907/j14fv-twh92">10.7907/j14fv-twh92</a></li>
<li>Martin, Alain J. (1991) <a href="https://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-93-28">Synthesis of Asynchronous VLSI Circuits</a>; <a href="https://doi.org/10.7907/b9wzv-xrc02">10.7907/b9wzv-xrc02</a></li>
<li>Burns, Steven M. and Martin, Alain J. (1990) <a href="https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-18">Performance Analysis and Optimization of Asynchronous Circuits</a>; <a href="https://doi.org/10.7907/b11q2-j0d17">10.7907/b11q2-j0d17</a></li>
<li>Martin, Alain J. and Hazewindus, Pieter J. (1990) <a href="https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-17">Testing Delay-Insensitive Circuits</a>; <a href="https://doi.org/10.7907/8274b-29b89">10.7907/8274b-29b89</a></li>
<li>Martin, Alain J. (1990) <a href="https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-02">Limitations to Delay-Insensitivity in Asynchronous Circuits</a>; <a href="https://doi.org/10.7907/gwkvs-p4122">10.7907/gwkvs-p4122</a></li>
<li>Martin, Alain J. (1990) <a href="https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-09">Asynchronous Circuits for Token-Ring Mutual Exclusion</a>; <a href="https://doi.org/10.7907/47710-bts58">10.7907/47710-bts58</a></li>
<li>Martin, Alain J. (1989) <a href="https://resolver.caltech.edu/CaltechCSTR:1989.cs-tr-89-01">Programming in VLSI: From Communicating Processes to Delay-Insensitive Circuits</a>; <a href="https://doi.org/10.7907/zmy86-a1w29">10.7907/zmy86-a1w29</a></li>
<li>Martin, Alain J. (1989) <a href="https://resolver.caltech.edu/CaltechCSTR:1989.cs-tr-89-02">The Design of an Asynchronous Microprocessor</a>; <a href="https://doi.org/10.7907/avec3-s7f02">10.7907/avec3-s7f02</a></li>
<li>Martin, Alain J. and Burns, Steven M., el al. (1989) <a href="https://resolver.caltech.edu/CaltechCSTR:1989.cs-tr-89-06">The First Aysnchronous Microprocessor: The Test Results</a>; <a href="https://doi.org/10.7907/bsky8-c6128">10.7907/bsky8-c6128</a></li>
<li>Hofstee, H. Peter and Martin, Alain J., el al. (1989) <a href="https://resolver.caltech.edu/CaltechCSTR:1989.cs-tr-90-06">Distributed Sorting</a>; <a href="https://doi.org/10.7907/zaevr-tmm71">10.7907/zaevr-tmm71</a></li>
<li>Martin, Alain J. (1988) <a href="https://resolver.caltech.edu/CaltechCSTR:1988.cs-tr-88-13">A Message-Passing Model for Highly Concurrent Computation</a>; <a href="https://doi.org/10.7907/3sb8a-cvh96">10.7907/3sb8a-cvh96</a></li>
<li>Burns, Steven M. and Martin, Alain J. (1988) <a href="https://resolver.caltech.edu/CaltechCSTR:1988.cs-tr-88-14">Syntax-Directed Translation of Concurrent Programs into Self-Timed Circuits</a>; <a href="https://doi.org/10.7907/585wz-fra78">10.7907/585wz-fra78</a></li>
<li>Martin, Alain J. (1987) <a href="https://resolver.caltech.edu/CaltechCSTR:1987.5256-tr-87">A Synthesis Method for Self-Timed VLSI Circuits</a>; <a href="https://doi.org/10.7907/649ae-we761">10.7907/649ae-we761</a></li>
<li>Burns, Steven M. and Martin, Alain J. (1987) <a href="https://resolver.caltech.edu/CaltechCSTR:1987.5253-tr-87">Synthesis of Self-Timed Circuits by Program Transformation</a>; <a href="https://doi.org/10.7907/cgpwa-2j421">10.7907/cgpwa-2j421</a></li>
<li>Seitz, Charles L. and Martin, Alain J., el al. (1987) <a href="https://resolver.caltech.edu/CaltechCSTR:1987.5240-tr-87">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/7cknj-w1w80">10.7907/7cknj-w1w80</a></li>
<li>Li, Peggy Pey-yun and Martin, Alain J. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5221-tr-86">The Sync Model: A Parallel Execution Method for Logic Programming</a>; <a href="https://doi.org/10.7907/brq3w-kj598">10.7907/brq3w-kj598</a></li>
<li>Martin, Alain J. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5212-tr-86">On Seitz' Arbiter</a>; <a href="https://doi.org/10.7907/2gjaq-xex23">10.7907/2gjaq-xex23</a></li>
<li>Martin, Alain J. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5210-tr-86">Compiling Communicating Processes into Delay-Insensitive VLSI Circuits</a>; <a href="https://doi.org/10.7907/pnf93-qxd46">10.7907/pnf93-qxd46</a></li>
<li>Martin, Alain J. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5211-tr-86">Self-Timed FIFO: An exercise in Compiling Programs into VLSI Circuits</a>; <a href="https://doi.org/10.7907/jssn5-rbp39">10.7907/jssn5-rbp39</a></li>
<li>Seitz, Charles L. and Kajiya, James T., el al. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5220-tr-86">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/rzewj-csb10">10.7907/rzewj-csb10</a></li>
<li>Seitz, Charles L. and Kajiya, James T., el al. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5235-tr-86">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/my65t-e9565">10.7907/my65t-e9565</a></li>
<li>Seitz, Charles L. and Kajiya, James T., el al. (1985) <a href="https://resolver.caltech.edu/CaltechCSTR:1985.5178-tr-85">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/7fbb9-smt37">10.7907/7fbb9-smt37</a></li>
<li>Seitz, Charles L. and Kajiya, James T., el al. (1985) <a href="https://resolver.caltech.edu/CaltechCSTR:1985.5202-tr-85">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/mrh1j-cjp65">10.7907/mrh1j-cjp65</a></li>
<li>Martin, Alain J. (1985) <a href="https://resolver.caltech.edu/CaltechCSTR:1985.5193-tr-85">A Delay-insensitive Fair Arbiter</a>; <a href="https://doi.org/10.7907/cchf5-w1g63">10.7907/cchf5-w1g63</a></li>
<li>Martin, Alain J. (1985) <a href="https://resolver.caltech.edu/CaltechCSTR:1985.5195-tr-85">A New Generalization of Dekker's Algorithm for Mutual Exclusion</a>; <a href="https://doi.org/10.7907/0qedb-76g96">10.7907/0qedb-76g96</a></li>
<li>Martin, Alain J. (1984) <a href="https://resolver.caltech.edu/CaltechCSTR:1984.5080-tr-83">Distributed Mutual Exclusion on a Ring of Processes</a>; <a href="https://doi.org/10.7907/t0t4e-aq296">10.7907/t0t4e-aq296</a></li>
<li>Martin, Alain J. and Burch, Jerry R. (1984) <a href="https://resolver.caltech.edu/CaltechCSTR:1984.5148-tr-84">Fair Mutual Exclusion with Unfair P and V Operations</a>; <a href="https://doi.org/10.7907/8nwds-15p23">10.7907/8nwds-15p23</a></li>
<li>Martin, Alain J. and Van de Snepscheut, Jan L. A. (1984) <a href="https://resolver.caltech.edu/CaltechCSTR:1984.5147-tr-84">Networks of Machines for Distributed Recursive Computations</a>; <a href="https://doi.org/10.7907/abxcf-t3r94">10.7907/abxcf-t3r94</a></li>
<li>Martin, Alain J. (1984) <a href="https://resolver.caltech.edu/CaltechCSTR:1984.5124-tr-84">The Probe: An Addition to Communication Primitives</a>; <a href="https://doi.org/10.7907/w8azk-3fk36">10.7907/w8azk-3fk36</a></li>
<li>Martin, Alain J. (1983) <a href="https://resolver.caltech.edu/CaltechCSTR:1983.5097-tr-83">The Design of a Self-timed Circuit for Distributed Mutual Exclusion</a>; <a href="https://doi.org/10.7907/b2dbm-s0762">10.7907/b2dbm-s0762</a></li>
<li>Martin, Alain J (1983) <a href="https://resolver.caltech.edu/CaltechCSTR:1983.5075-tr-83">A General Proof Rule for Procedures in Predicate Transformer Semantics</a>; <a href="https://doi.org/10.7907/desx8-jhv04">10.7907/desx8-jhv04</a></li>
<li>Martin, Alain J. (1982) <a href="https://resolver.caltech.edu/CaltechCSTR:1982.5047-tr-82">The torus: an exercise in constructing a processing surface</a>; <a href="https://doi.org/10.7907/cazcq-6fz54">10.7907/cazcq-6fz54</a></li>
<li>Martin, A. J. (1980) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20120418-114041991">A Distributed Implementation Method for Parallel Programming</a>; <a href="https://doi.org/10.7907/c1h76-gdn90">10.7907/c1h76-gdn90</a></li>
</ul>