@other{https://resolver.caltech.edu/CaltechTHESIS:08172013-192316055,
    title = "Robust Near-Threshold QDI Circuit Analysis and Design",
    year = "2014",
    url = "https://resolver.caltech.edu/CaltechTHESIS:08172013-192316055",
    id = "record",
    doi = "10.7907/79EJ-Q945"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:10072012-230900231,
    title = "An Ultra-Low-Energy, Variation-Tolerant FPGA Architecture Using Component-Specific Mapping",
    year = "2013",
    url = "https://resolver.caltech.edu/CaltechTHESIS:10072012-230900231",
    id = "record",
    doi = "10.7907/358S-CW22"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:08192012-145253489,
    title = "GRAph Parallel Actor Language: A Programming Language for Parallel Graph Algorithms",
    year = "2013",
    url = "https://resolver.caltech.edu/CaltechTHESIS:08192012-145253489",
    id = "record",
    doi = "10.7907/M3TW-7Y53"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:05312011-123940546,
    title = "Applying Formal Methods to Distributed Algorithms Using Local-Global Relations  ",
    year = "2011",
    url = "https://resolver.caltech.edu/CaltechTHESIS:05312011-123940546",
    id = "record",
    doi = "10.7907/8FRW-ZF17"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:10262010-082537998,
    title = "SPICE²: A Spatial, Parallel Architecture for Accelerating the Spice Circuit Simulator
 ",
    year = "2011",
    url = "https://resolver.caltech.edu/CaltechTHESIS:10262010-082537998",
    id = "record",
    doi = "10.7907/QVZR-VB52"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-01242008-012650,
    title = "Reliable Integration of Terascale Systems with Nanoscale Devices",
    year = "2008",
    url = "https://resolver.caltech.edu/CaltechETD:etd-01242008-012650",
    id = "record",
    doi = "10.7907/P842-7B49"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-05262008-234258,
    title = "Throughput Optimization of Quasi Delay Insensitive Circuits via Slack Matching",
    year = "2008",
    url = "https://resolver.caltech.edu/CaltechETD:etd-05262008-234258",
    id = "record",
    doi = "10.7907/9HMY-RR92"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-05292008-231048,
    title = "Adaptive Learning Algorithms and Data Cloning",
    year = "2008",
    url = "https://resolver.caltech.edu/CaltechETD:etd-05292008-231048",
    id = "record",
    doi = "10.7907/GV3D-AB69"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-11092007-180524,
    title = "Soft-Error Tolerant Quasi Delay-insensitive Circuits",
    year = "2008",
    url = "https://resolver.caltech.edu/CaltechETD:etd-11092007-180524",
    id = "record",
    doi = "10.7907/ZVFF-WE07"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-04262007-131214,
    title = "CMOS Imaging Technology with Embedded Early Image Processing",
    year = "2007",
    url = "https://resolver.caltech.edu/CaltechETD:etd-04262007-131214",
    id = "record",
    doi = "10.7907/2GZN-T836"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-05222007-211909,
    title = "Reflection and Its Application to Mechanized MetaReasoning About Programming Languages",
    year = "2007",
    url = "https://resolver.caltech.edu/CaltechETD:etd-05222007-211909",
    id = "record",
    doi = "10.7907/S0HG-RT72"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-01132006-152609,
    title = "Rigorous Analog Verification of Asynchronous Circuits",
    year = "2006",
    url = "https://resolver.caltech.edu/CaltechETD:etd-01132006-152609",
    id = "record",
    doi = "10.7907/4R8F-WF03"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-05032004-153842,
    title = "Cyclic Combinational Circuits",
    year = "2004",
    url = "https://resolver.caltech.edu/CaltechETD:etd-05032004-153842",
    id = "record",
    doi = "10.7907/410B-XR25"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:11192009-161338958,
    title = "High-Level Synthesis and Rapid Prototyping of Asynchronous VLSI Systems",
    year = "2004",
    url = "https://resolver.caltech.edu/CaltechTHESIS:11192009-161338958",
    id = "record",
    doi = "10.7907/5N2N-0W58"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:03022011-131111881,
    title = "Energy-Delay Complexity of Asynchronous Circuits",
    year = "2002",
    url = "https://resolver.caltech.edu/CaltechTHESIS:03022011-131111881",
    id = "record",
    doi = "10.7907/9jpj-5s67"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-12072001-160019,
    title = "Dynamic UNITY",
    year = "2002",
    url = "https://resolver.caltech.edu/CaltechETD:etd-12072001-160019",
    id = "record",
    doi = "10.7907/AC6E-WE21"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-10022001-201911,
    title = "Analog Computation and Learning in VLSI",
    year = "2001",
    url = "https://resolver.caltech.edu/CaltechETD:etd-10022001-201911",
    id = "record",
    doi = "10.7907/9B65-TB43"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-08272001-155016,
    title = "Why multicast protocols (don't) scale: an analysis of multipoint algorithms for scalable group communication",
    year = "2001",
    url = "https://resolver.caltech.edu/CaltechETD:etd-08272001-155016",
    id = "record",
    doi = "10.7907/44QZ-R465"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:10152010-145548970,
    title = "Asynchronous Pulse Logic",
    year = "2001",
    url = "https://resolver.caltech.edu/CaltechTHESIS:10152010-145548970",
    id = "record",
    doi = "10.7907/B107-MW15"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-08112005-114144,
    title = "The impact of asynchrony on computer architecture",
    year = "1999",
    url = "https://resolver.caltech.edu/CaltechETD:etd-08112005-114144",
    id = "record",
    doi = "10.7907/xzwa-p598"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-01242008-074143,
    title = "A structured approach to parallel programming",
    year = "1998",
    url = "https://resolver.caltech.edu/CaltechETD:etd-01242008-074143",
    id = "record",
    doi = "10.7907/5ma9-h225"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-01252008-095244,
    title = "A method for the specification, composition, and testing of distributed object systems",
    year = "1998",
    url = "https://resolver.caltech.edu/CaltechETD:etd-01252008-095244",
    id = "record",
    doi = "10.7907/z89g-gm27"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-01092008-085128,
    title = "Retinomorphic vision systems : reverse engineering the vertebrate retina",
    year = "1997",
    url = "https://resolver.caltech.edu/CaltechETD:etd-01092008-085128",
    id = "record",
    doi = "10.7907/96W6-N605"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-10162007-093427,
    title = "Semantics of VLSI synthesis",
    year = "1995",
    url = "https://resolver.caltech.edu/CaltechETD:etd-10162007-093427",
    id = "record",
    doi = "10.7907/SR5V-KT18"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-10162007-111256,
    title = "Toward reliable modular programs",
    year = "1995",
    url = "https://resolver.caltech.edu/CaltechETD:etd-10162007-111256",
    id = "record",
    doi = "10.7907/ynt2-nn65"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-10172007-090528,
    title = "A General Approach to Performance Analysis and Optimization of Asynchronous Circuits",
    year = "1995",
    url = "https://resolver.caltech.edu/CaltechETD:etd-10172007-090528",
    id = "record",
    doi = "10.7907/ehzs-y537"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-10112007-083903,
    title = "Synchronizing processes",
    year = "1995",
    url = "https://resolver.caltech.edu/CaltechETD:etd-10112007-083903",
    id = "record",
    doi = "10.7907/G620-GG65"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-08302007-094049,
    title = "On the VLSI decompositions for complete graphs, DeBruijn graphs, hypercubes, hyperplanes, meshes, and shuffle-exchange graphs",
    year = "1993",
    url = "https://resolver.caltech.edu/CaltechETD:etd-08302007-094049",
    id = "record",
    doi = "10.7907/s7w7-a995"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-07202007-132706,
    title = "Testing delay-insensitive circuits",
    year = "1992",
    url = "https://resolver.caltech.edu/CaltechETD:etd-07202007-132706",
    id = "record",
    doi = "10.7907/0d7v-9d09"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:09122011-094355148,
    title = "VLSI Analogs of Neuronal Visual Processing: A Synthesis of Form and Function",
    year = "1992",
    url = "https://resolver.caltech.edu/CaltechTHESIS:09122011-094355148",
    id = "record",
    doi = "10.7907/4bdw-fg34"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-07092007-072640,
    title = "Performance analysis and optimization of asynchronous circuits",
    year = "1991",
    url = "https://resolver.caltech.edu/CaltechETD:etd-07092007-072640",
    id = "record",
    doi = "10.7907/kez1-7q52"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-07122007-134330,
    title = "Wiring Considerations in Analog VLSI Systems, with Application to Field-Programmable Networks",
    year = "1991",
    url = "https://resolver.caltech.edu/CaltechETD:etd-07122007-134330",
    id = "record",
    doi = "10.7907/stj4-kh72"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:03222012-091423469,
    title = "Reactive-Process Programming and Distributed Discrete-Event Simulation",
    year = "1990",
    url = "https://resolver.caltech.edu/CaltechTHESIS:03222012-091423469",
    id = "record",
    doi = "10.7907/9qzd-kv20"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-02132007-153533,
    title = "A Framework for Adaptive Routing in Multicomputer Networks",
    year = "1989",
    url = "https://resolver.caltech.edu/CaltechETD:etd-02132007-153533",
    id = "record",
    doi = "10.7907/a01h-0z81"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-02282008-111427,
    title = "Logic from Programming Language Semantics",
    year = "1987",
    url = "https://resolver.caltech.edu/CaltechETD:etd-02282008-111427",
    id = "record",
    doi = "10.7907/r9hf-1b88"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-02282008-091326,
    title = "Fine Grain Concurrent Computations",
    year = "1987",
    url = "https://resolver.caltech.edu/CaltechETD:etd-02282008-091326",
    id = "record",
    doi = "10.7907/63xc-r308"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-03252008-140428,
    title = "A VLSI Architecture for Concurrent Data Structures",
    year = "1986",
    url = "https://resolver.caltech.edu/CaltechETD:etd-03252008-140428",
    id = "record",
    doi = "10.7907/f8d5-x741"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-03192008-143903,
    title = "A Parallel Execution Model for Logic Programming",
    year = "1986",
    url = "https://resolver.caltech.edu/CaltechETD:etd-03192008-143903",
    id = "record",
    doi = "10.7907/2ngs-bp80"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-03262008-092115,
    title = "Coupled-Inductor Inversion, Rectification and Cycloconversion",
    year = "1986",
    url = "https://resolver.caltech.edu/CaltechETD:etd-03262008-092115",
    id = "record",
    doi = "10.7907/BHKX-4J16"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-04102008-142130,
    title = "Combining Computation with Geometry",
    year = "1985",
    url = "https://resolver.caltech.edu/CaltechETD:etd-04102008-142130",
    id = "record",
    doi = "10.7907/n1qe-h846"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-08312006-094203,
    title = "Space-time Algorithms: Semantics and Methodology",
    year = "1983",
    url = "https://resolver.caltech.edu/CaltechETD:etd-08312006-094203",
    id = "record",
    doi = "10.7907/bfpj-t811"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-09142006-085516,
    title = "The Extension of Object-Oriented Languages to a Homogeneous, Concurrent Architecture",
    year = "1982",
    url = "https://resolver.caltech.edu/CaltechETD:etd-09142006-085516",
    id = "record",
    doi = "10.7907/9EVC-2X08"
}