<h1>Martin, Alain</h1>
<h2>Monograph from <a href="https://data.caltech.edu">CaltechTHESIS advisor</a></h2>
<ul>
<li>Chang, Xiaofei (2014) <a href="https://resolver.caltech.edu/CaltechTHESIS:10042013-160844239">Resetting Asynchronous QDI Systems</a>; <a href="https://doi.org/10.7907/RNGK-RV18">10.7907/RNGK-RV18</a></li>
<li>Keller, Sean Jason (2014) <a href="https://resolver.caltech.edu/CaltechTHESIS:08172013-192316055">Robust Near-Threshold QDI Circuit Analysis and Design</a>; <a href="https://doi.org/10.7907/79EJ-Q945">10.7907/79EJ-Q945</a></li>
<li>Jang, Wonjin (2008) <a href="https://resolver.caltech.edu/CaltechETD:etd-11092007-180524">Soft-Error Tolerant Quasi Delay-insensitive Circuits</a>; <a href="https://doi.org/10.7907/ZVFF-WE07">10.7907/ZVFF-WE07</a></li>
<li>Prakash, Piyush (2008) <a href="https://resolver.caltech.edu/CaltechETD:etd-05262008-234258">Throughput Optimization of Quasi Delay Insensitive Circuits via Slack Matching</a>; <a href="https://doi.org/10.7907/9HMY-RR92">10.7907/9HMY-RR92</a></li>
<li>Papadantonakis, Karl Spyros (2006) <a href="https://resolver.caltech.edu/CaltechETD:etd-01132006-152609">Rigorous Analog Verification of Asynchronous Circuits</a>; <a href="https://doi.org/10.7907/4R8F-WF03">10.7907/4R8F-WF03</a></li>
<li>Prakash, Piyush (2005) <a href="https://resolver.caltech.edu/CaltechETD:etd-05272005-134017">Slack Matching</a>; <a href="https://doi.org/10.7907/g43p-hv51">10.7907/g43p-hv51</a></li>
<li>Wong, Catherine Grace (2004) <a href="https://resolver.caltech.edu/CaltechTHESIS:11192009-161338958">High-Level Synthesis and Rapid Prototyping of Asynchronous VLSI Systems</a>; <a href="https://doi.org/10.7907/5N2N-0W58">10.7907/5N2N-0W58</a></li>
<li>Ginis, Roman (2002) <a href="https://resolver.caltech.edu/CaltechETD:etd-11012005-093745">Automating Resource Management for Distributed Business Processes</a>; <a href="https://doi.org/10.7907/9GXT-BD03">10.7907/9GXT-BD03</a></li>
<li>Papadantonakis, Karl Spyros (2002) <a href="https://resolver.caltech.edu/CaltechETD:etd-08222002-122806">What is &quot;Deterministic CHP&quot;, and is &quot;Slack Elasticity&quot; That Useful?</a>; <a href="https://doi.org/10.7907/PCCK-CS43">10.7907/PCCK-CS43</a></li>
<li>Pénzes, Paul Ivan (2002) <a href="https://resolver.caltech.edu/CaltechTHESIS:03022011-131111881">Energy-Delay Complexity of Asynchronous Circuits</a>; <a href="https://doi.org/10.7907/9jpj-5s67">10.7907/9jpj-5s67</a></li>
<li>Nyström, Mika (2001) <a href="https://resolver.caltech.edu/CaltechTHESIS:10152010-145548970">Asynchronous Pulse Logic</a>; <a href="https://doi.org/10.7907/B107-MW15">10.7907/B107-MW15</a></li>
<li>Manohar, Rajit (1999) <a href="https://resolver.caltech.edu/CaltechETD:etd-08112005-114144">The impact of asynchrony on computer architecture</a>; <a href="https://doi.org/10.7907/xzwa-p598">10.7907/xzwa-p598</a></li>
<li>Van der Goot, Marcel Rene (1995) <a href="https://resolver.caltech.edu/CaltechETD:etd-10162007-093427">Semantics of VLSI synthesis</a>; <a href="https://doi.org/10.7907/SR5V-KT18">10.7907/SR5V-KT18</a></li>
<li>Tierno, Jose Andres (1995) <a href="https://resolver.caltech.edu/CaltechETD:etd-10252007-094408">An energy-complexity model for VLSI computations</a>; <a href="https://doi.org/10.7907/PP38-4935">10.7907/PP38-4935</a></li>
<li>Lee, Tak Kwan (1995) <a href="https://resolver.caltech.edu/CaltechETD:etd-10172007-090528">A General Approach to Performance Analysis and Optimization of Asynchronous Circuits</a>; <a href="https://doi.org/10.7907/ehzs-y537">10.7907/ehzs-y537</a></li>
<li>Hazewindus, Pieter Johannes (1992) <a href="https://resolver.caltech.edu/CaltechETD:etd-07202007-132706">Testing delay-insensitive circuits</a>; <a href="https://doi.org/10.7907/0d7v-9d09">10.7907/0d7v-9d09</a></li>
<li>Burns, Steven Morgan (1991) <a href="https://resolver.caltech.edu/CaltechETD:etd-07092007-072640">Performance analysis and optimization of asynchronous circuits</a>; <a href="https://doi.org/10.7907/kez1-7q52">10.7907/kez1-7q52</a></li>
<li>Burch, Jerry R. (1988) <a href="https://resolver.caltech.edu/CaltechTHESIS:03262012-113851465">A Comparison of Strict and Non-Strict Semantics for Lists</a>; <a href="https://doi.org/10.7907/01bb-3j05">10.7907/01bb-3j05</a></li>
<li>Li, Peyyun Peggy (1986) <a href="https://resolver.caltech.edu/CaltechETD:etd-03192008-143903">A Parallel Execution Model for Logic Programming</a>; <a href="https://doi.org/10.7907/2ngs-bp80">10.7907/2ngs-bp80</a></li>
</ul>