<h1>Martin, Alain</h1> <h2>Combined from <a href="https://authors.library.caltech.edu">CaltechAUTHORS</a></h2> <ul> <li>Keller, Sean and Martin, Alain J., el al. (2015) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20160901-124814686">DD1: A QDI, Radiation-Hard-by-Design, Near-Threshold 18uW/MIPS Microcontroller in 40nm Bulk CMOS</a>; ISBN 978-1-4799-8716-0; Asynchronous Circuits and Systems (ASYNC), 2015; 37-44; <a href="https://doi.org/10.1109/ASYNC.2015.15">10.1109/ASYNC.2015.15</a></li> <li>Keller, Sean and Harris, David Money, el al. (2014) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20141106-133106801">A Compact Transregional Model for Digital CMOS Circuits Operating Near Threshold</a>; IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Vol. 22; No. 10; 2041-2053; <a href="https://doi.org/10.1109/TVLSI.2013.2282316">10.1109/TVLSI.2013.2282316</a></li> <li>Martin, Alain J. (2014) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20140206-111915844">25 Years Ago: The First Asynchronous Microprocessor</a>; <a href="https://doi.org/10.7907/Z9QR4V3H">10.7907/Z9QR4V3H</a></li> <li>Keller, Sean and Bhargav, Siddharth S., el al. (2014) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20141125-133400175">Quantifying Near-Threshold CMOS Circuit Robustness</a>; <a href="https://doi.org/10.7907/Z9M043CG">10.7907/Z9M043CG</a></li> <li>Martin, Alain J. (2009) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20170320-175344479">Asynchronous logic for high variability nano-CMOS</a>; ISBN 978-1-4244-5090-9; 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009); 69-72; <a href="https://doi.org/10.1109/ICECS.2009.5410925">10.1109/ICECS.2009.5410925</a></li> <li>Keller, Sean and Katelmany, Michael, el al. (2009) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20100506-101621122">A Necessary and Sufficient Timing Assumption for Speed-Independent Circuits</a>; ISBN 9781424439331; 15th International Symposium on Advanced Research in Asynchronous Circuits and Systems : (ASYNC 2009) : proceedings : 17-19 May 2009 Chapel Hill, North Carolina, USA; 65-76; <a href="https://doi.org/10.1109/ASYNC.2009.27">10.1109/ASYNC.2009.27</a></li> <li>Martin, Alain J. and Prakash, Piyush (2008) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20100722-151724013">Asynchronous Nano-Electronics: Preliminary Investigation</a>; ISBN 978-0-7695-3107-6; 14th IEEE International Symposium on Asynchronous Circuits and Systems : ASYNC 2008; 58-68; <a href="https://doi.org/10.1109/ASYNC.2008.22">10.1109/ASYNC.2008.22</a></li> <li>Martin, Alain J. and Nyström, Mika (2006) <a href="https://resolver.caltech.edu/CaltechAUTHORS:MARprocieee06">Asynchronous techniques for system-on-chip design</a>; Proceedings of the IEEE; Vol. 94; No. 6; 1089-1120; <a href="https://doi.org/10.1109/JPROC.2006.875789">10.1109/JPROC.2006.875789</a></li> <li>Martin, Alain J. (2006) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20110722-095429816">Can asynchronous techniques help the SoC designer?</a>; ISBN 978-3-901882-19-7; IFIP VLSI-SoC 2006: IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration & System-on-Chip; 7-11; <a href="https://doi.org/10.1109/VLSISOC.2006.313284">10.1109/VLSISOC.2006.313284</a></li> <li>Prakash, Piyush and Martin, Alain J. (2006) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20110225-095524705">Slack Matching Quasi Delay-Insensitive Circuits</a>; ISBN 0-7695-2498-2; 12th IEEE International Symposium on Asynchronous Circuits and Systems; 195-204; <a href="https://doi.org/10.1109/ASYNC.2006.27">10.1109/ASYNC.2006.27</a></li> <li>Wong, Catherine G. and Martin, Alain J. (2003) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20170109-145144866">High-level synthesis of asynchronous systems by data-driven decomposition</a>; ISBN 1-58113-688-9; DAC '03 Proceedings of the 40th annual Design Automation Conference; 508-513; <a href="https://doi.org/10.1145/775832.775962">10.1145/775832.775962</a></li> <li>Wong, Catherine G. and Martin, Alain J., el al. (2003) <a href="https://resolver.caltech.edu/CaltechCSTR:2003.006a">An Architecture for Asynchronous FPGAs</a></li> <li>Wong, Catherine G. and Martin, Alain J., el al. (2003) <a href="https://resolver.caltech.edu/CaltechCSTR:2003.006">An Architecture for Asynchronous FPGAs</a>; <a href="https://doi.org/10.7907/Z9X9288B">10.7907/Z9X9288B</a></li> <li>Pénzes, Paul I. and Nyström, Mika, el al. (2002) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20161207-170651411">Transistor sizing of energy-delay-efficient circuits</a>; ISBN 1-58113-526-2; TAU '02 Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems; 126-133; <a href="https://doi.org/10.1145/589411.589439">10.1145/589411.589439</a></li> <li>Pénzes, Paul I. and Martin, Alain J. (2002) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20161207-165804629">Energy-Delay Efficiency of VLSI Computations</a>; ISBN 1-58113-462-2; GLSVLSI '02 Proceedings of the 12th ACM Great Lakes symposium on VLSI; 104-111; <a href="https://doi.org/10.1145/505306.505330">10.1145/505306.505330</a></li> <li>Pénzes, Paul I. and Nyströem, Mika, el al. (2002) <a href="https://resolver.caltech.edu/CaltechCSTR:2002.003">Transistor Sizing of Energy-Delay-Efficient Circuits</a>; <a href="https://doi.org/10.7907/Z9ZG6Q7T">10.7907/Z9ZG6Q7T</a></li> <li>Martin, Alain J. and Nyström, Mika, el al. (2001) <a href="https://resolver.caltech.edu/CaltechCSTR:2001.012">Speed and Energy Performance of an Asynchronous MIPS R3000 Microprocessor</a>; <a href="https://doi.org/10.7907/Z99S1P11">10.7907/Z99S1P11</a></li> <li>Pénzes, Paul I. and Martin, Alain J. (2001) <a href="https://resolver.caltech.edu/CaltechCSTR:2002.002">Global and local properties of asynchronous circuits optimized for energy efficiency</a>; <a href="https://doi.org/10.7907/Z9FJ2DSS">10.7907/Z9FJ2DSS</a></li> <li>Martin, Alain J. and Nyströem, Mika, el al. (2001) <a href="https://resolver.caltech.edu/CaltechCSTR:2001.007">ET^2: A Metric For Time and Energy Efficiency of Computation</a>; <a href="https://doi.org/10.7907/Z9K935JZ">10.7907/Z9K935JZ</a></li> <li>Manohar, Rajit and Martin, Alain J. (1998) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20201210-161233167">Slack elasticity in concurrent computing</a>; ISBN 9783540645917; Mathematics of Program Construction; 272-285; <a href="https://doi.org/10.1007/bfb0054295">10.1007/bfb0054295</a></li> <li>Back, R. J. R. and Martin, A. J., el al. (1996) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20170409-083932724">Specifying the Caltech asynchronous microprocessor</a>; Science of Computer Programming; Vol. 26; No. 1-3; 79-97; <a href="https://doi.org/10.1016/0167-6423(95)00023-2">10.1016/0167-6423(95)00023-2</a></li> <li>Manohar, Rajit and Martin, Alain J. (1995) <a href="https://resolver.caltech.edu/CaltechCSTR:1995.cs-tr-95-11">Quasi-Delay-Insensitive Circuits are Turing-Complete</a>; <a href="https://doi.org/10.7907/Z9H70CV1">10.7907/Z9H70CV1</a></li> <li>Back, R. J. R. and Martin, A. J., el al. (1995) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20201124-174613902">An action system specification of the Caltech asynchronous microprocessor</a>; ISBN 9783540601173; Mathematics of Program Construction; 159-179; <a href="https://doi.org/10.1007/3-540-60117-1_9">10.1007/3-540-60117-1_9</a></li> <li>Tierno, Jose A. and Martin, Alain J. (1994) <a href="https://resolver.caltech.edu/CaltechCSTR:1994.cs-tr-94-21">Low-Energy Asynchronous Memory Design</a>; <a href="https://doi.org/10.7907/Z9X9289S">10.7907/Z9X9289S</a></li> <li>Tierno, José A. and Martin, Alain J., el al. (1994) <a href="https://resolver.caltech.edu/CaltechAUTHORS:TIEieeedtc94">A 100-MIPS GaAs asynchronous microprocessor</a>; IEEE Design and Test of Computers; Vol. 11; No. 2; 43-49; <a href="https://doi.org/10.1109/54.282444">10.1109/54.282444</a></li> <li>Seitz, Charles L. and Martin, Alain J., el al. (1993) <a href="https://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-37">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/Z9NS0RX7">10.7907/Z9NS0RX7</a></li> <li>Seitz, Charles L. and Martin, Alain J., el al. (1993) <a href="https://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-10">Submicron Systems Architecture</a>; <a href="https://doi.org/10.7907/4fh9g-yr824">10.7907/4fh9g-yr824</a></li> <li>Tierno, Jose A. and Martin, Alain J., el al. (1993) <a href="https://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-38">An Asynchronous Microprocessor in Gallium Arsenide</a>; <a href="https://doi.org/10.7907/Z9BC3WJ5">10.7907/Z9BC3WJ5</a></li> <li>Martin, Alain J. (1993) <a href="https://resolver.caltech.edu/CaltechCSTR:1993.cs-tr-93-26">Tomorrow's Digital Hardware will be Asynchronous and Verified</a>; <a href="https://doi.org/10.7907/Z9125QPR">10.7907/Z9125QPR</a></li> <li>Seitz, Charles L. and Martin, Alain J., el al. (1992) <a href="https://resolver.caltech.edu/CaltechCSTR:1992.cs-tr-92-17">Submicron Systems Architecture Project : Semiannual Technical Report, 1 July 1992</a>; <a href="https://doi.org/10.7907/Z9WS8RF5">10.7907/Z9WS8RF5</a></li> <li>Nielsen, Christian D. and Martin, Alain J. (1992) <a href="https://resolver.caltech.edu/CaltechCSTR:1992.cs-tr-92-03">Delay-Insensitive Multiply-Accumulate Unit</a>; <a href="https://doi.org/10.7907/Z9MG7MPP">10.7907/Z9MG7MPP</a></li> <li>Martin, Alain J. (1991) <a href="https://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-91-08">Asynchronous Datapaths and the Design of an Asynchronous Adder</a>; <a href="https://doi.org/10.7907/j14fv-twh92">10.7907/j14fv-twh92</a></li> <li>Martin, Alain J. (1991) <a href="https://resolver.caltech.edu/CaltechCSTR:1991.cs-tr-93-28">Synthesis of Asynchronous VLSI Circuits</a>; <a href="https://doi.org/10.7907/b9wzv-xrc02">10.7907/b9wzv-xrc02</a></li> <li>Hofstee, H. Peter and Martin, Alain J., el al. (1990) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20170830-083320673">Distributed sorting</a>; Science of Computer Programming; Vol. 15; No. 2-3; 119-133; <a href="https://doi.org/10.1016/0167-6423(90)90081-N">10.1016/0167-6423(90)90081-N</a></li> <li>Martin, Alain J. (1990) <a href="https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-02">Limitations to Delay-Insensitivity in Asynchronous Circuits</a>; <a href="https://doi.org/10.7907/gwkvs-p4122">10.7907/gwkvs-p4122</a></li> <li>Martin, Alain J. and Hazewindus, Pieter J. (1990) <a href="https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-17">Testing Delay-Insensitive Circuits</a>; <a href="https://doi.org/10.7907/8274b-29b89">10.7907/8274b-29b89</a></li> <li>Martin, Alain J. (1990) <a href="https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-09">Asynchronous Circuits for Token-Ring Mutual Exclusion</a>; <a href="https://doi.org/10.7907/47710-bts58">10.7907/47710-bts58</a></li> <li>Burns, Steven M. and Martin, Alain J. (1990) <a href="https://resolver.caltech.edu/CaltechCSTR:1990.cs-tr-90-18">Performance Analysis and Optimization of Asynchronous Circuits</a>; <a href="https://doi.org/10.7907/b11q2-j0d17">10.7907/b11q2-j0d17</a></li> <li>Martin, Alain J. and Burns, Steven M., el al. (1989) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20161130-144153368">The design of an asynchronous microprocessor</a>; ACM SIGARCH Computer Architecture News; Vol. 17; No. 4; 99-110</li> <li>Martin, Alain J. and Burns, Steven M., el al. (1989) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20161130-145428229">The first asynchronous microprocessor: the test results</a>; ACM SIGARCH Computer Architecture News; Vol. 17; No. 4; 95-98; <a href="https://doi.org/10.1145/71317.71324">10.1145/71317.71324</a></li> <li>Martin, Alain J. (1989) <a href="https://resolver.caltech.edu/CaltechCSTR:1989.cs-tr-89-01">Programming in VLSI: From Communicating Processes to Delay-Insensitive Circuits</a>; <a href="https://doi.org/10.7907/zmy86-a1w29">10.7907/zmy86-a1w29</a></li> <li>Martin, Alain J. (1989) <a href="https://resolver.caltech.edu/CaltechCSTR:1989.cs-tr-89-02">The Design of an Asynchronous Microprocessor</a>; <a href="https://doi.org/10.7907/avec3-s7f02">10.7907/avec3-s7f02</a></li> <li>Martin, Alain J. and Burns, Steven M., el al. (1989) <a href="https://resolver.caltech.edu/CaltechCSTR:1989.cs-tr-89-06">The First Aysnchronous Microprocessor: The Test Results</a>; <a href="https://doi.org/10.7907/bsky8-c6128">10.7907/bsky8-c6128</a></li> <li>Hofstee, H. Peter and Martin, Alain J., el al. (1989) <a href="https://resolver.caltech.edu/CaltechCSTR:1989.cs-tr-90-06">Distributed Sorting</a>; <a href="https://doi.org/10.7907/zaevr-tmm71">10.7907/zaevr-tmm71</a></li> <li>Martin, Alain J. and Van de Snepscheut, Jan L. A. (1989) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20201008-131242613">Design of Synchronization Algorithms</a>; ISBN 9783642748868; Constructive Methods in Computing Science; 447-478; <a href="https://doi.org/10.1007/978-3-642-74884-4_13">10.1007/978-3-642-74884-4_13</a></li> <li>Martin, Alain J. (1988) <a href="https://resolver.caltech.edu/CaltechCSTR:1988.cs-tr-88-13">A Message-Passing Model for Highly Concurrent Computation</a>; <a href="https://doi.org/10.7907/3sb8a-cvh96">10.7907/3sb8a-cvh96</a></li> <li>Burns, Steven M. and Martin, Alain J. (1988) <a href="https://resolver.caltech.edu/CaltechCSTR:1988.cs-tr-88-14">Syntax-Directed Translation of Concurrent Programs into Self-Timed Circuits</a>; <a href="https://doi.org/10.7907/585wz-fra78">10.7907/585wz-fra78</a></li> <li>Seitz, Charles L. and Athas, William C., el al. (1988) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20161215-172443490">The architecture and programming of the Ametek series 2010 multicomputer</a>; ISBN 0-89791-278-0; Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues; 33-37; <a href="https://doi.org/10.1145/62297.62302">10.1145/62297.62302</a></li> <li>Martin, Alain J. (1988) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20161130-143104095">A message-passing model for highly concurrent computation</a>; ISBN 0-89791-278-0; C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues; 520-527; <a href="https://doi.org/10.1145/62297.62360">10.1145/62297.62360</a></li> <li>Burns, Steven M. and Martin, Alain J. (1987) <a href="https://resolver.caltech.edu/CaltechCSTR:1987.5253-tr-87">Synthesis of Self-Timed Circuits by Program Transformation</a>; <a href="https://doi.org/10.7907/cgpwa-2j421">10.7907/cgpwa-2j421</a></li> <li>Seitz, Charles L. and Martin, Alain J., el al. (1987) <a href="https://resolver.caltech.edu/CaltechCSTR:1987.5240-tr-87">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/7cknj-w1w80">10.7907/7cknj-w1w80</a></li> <li>Martin, Alain J. (1987) <a href="https://resolver.caltech.edu/CaltechCSTR:1987.5256-tr-87">A Synthesis Method for Self-Timed VLSI Circuits</a>; <a href="https://doi.org/10.7907/649ae-we761">10.7907/649ae-we761</a></li> <li>Martin, Alain J. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5211-tr-86">Self-Timed FIFO: An exercise in Compiling Programs into VLSI Circuits</a>; <a href="https://doi.org/10.7907/jssn5-rbp39">10.7907/jssn5-rbp39</a></li> <li>Seitz, Charles L. and Kajiya, James T., el al. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5235-tr-86">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/my65t-e9565">10.7907/my65t-e9565</a></li> <li>Martin, Alain J. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5210-tr-86">Compiling Communicating Processes into Delay-Insensitive VLSI Circuits</a>; <a href="https://doi.org/10.7907/pnf93-qxd46">10.7907/pnf93-qxd46</a></li> <li>Seitz, Charles L. and Kajiya, James T., el al. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5220-tr-86">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/rzewj-csb10">10.7907/rzewj-csb10</a></li> <li>Li, Peggy Pey-yun and Martin, Alain J. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5221-tr-86">The Sync Model: A Parallel Execution Method for Logic Programming</a>; <a href="https://doi.org/10.7907/brq3w-kj598">10.7907/brq3w-kj598</a></li> <li>Martin, Alain J. (1986) <a href="https://resolver.caltech.edu/CaltechCSTR:1986.5212-tr-86">On Seitz' Arbiter</a>; <a href="https://doi.org/10.7907/2gjaq-xex23">10.7907/2gjaq-xex23</a></li> <li>Seitz, Charles L. and Kajiya, James T., el al. (1985) <a href="https://resolver.caltech.edu/CaltechCSTR:1985.5178-tr-85">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/7fbb9-smt37">10.7907/7fbb9-smt37</a></li> <li>Martin, Alain J. (1985) <a href="https://resolver.caltech.edu/CaltechCSTR:1985.5195-tr-85">A New Generalization of Dekker's Algorithm for Mutual Exclusion</a>; <a href="https://doi.org/10.7907/0qedb-76g96">10.7907/0qedb-76g96</a></li> <li>Martin, Alain J. (1985) <a href="https://resolver.caltech.edu/CaltechCSTR:1985.5193-tr-85">A Delay-insensitive Fair Arbiter</a>; <a href="https://doi.org/10.7907/cchf5-w1g63">10.7907/cchf5-w1g63</a></li> <li>Seitz, Charles L. and Kajiya, James T., el al. (1985) <a href="https://resolver.caltech.edu/CaltechCSTR:1985.5202-tr-85">Submicron Systems Architecture: Semiannual Technical Report</a>; <a href="https://doi.org/10.7907/mrh1j-cjp65">10.7907/mrh1j-cjp65</a></li> <li>Martin, Alain J. and Van de Snepscheut, Jan L. A. (1984) <a href="https://resolver.caltech.edu/CaltechCSTR:1984.5147-tr-84">Networks of Machines for Distributed Recursive Computations</a>; <a href="https://doi.org/10.7907/abxcf-t3r94">10.7907/abxcf-t3r94</a></li> <li>Martin, Alain J. and Burch, Jerry R. (1984) <a href="https://resolver.caltech.edu/CaltechCSTR:1984.5148-tr-84">Fair Mutual Exclusion with Unfair P and V Operations</a>; <a href="https://doi.org/10.7907/8nwds-15p23">10.7907/8nwds-15p23</a></li> <li>Martin, Alain J. (1984) <a href="https://resolver.caltech.edu/CaltechCSTR:1984.5124-tr-84">The Probe: An Addition to Communication Primitives</a>; <a href="https://doi.org/10.7907/w8azk-3fk36">10.7907/w8azk-3fk36</a></li> <li>Martin, Alain J. (1984) <a href="https://resolver.caltech.edu/CaltechCSTR:1984.5080-tr-83">Distributed Mutual Exclusion on a Ring of Processes</a>; <a href="https://doi.org/10.7907/t0t4e-aq296">10.7907/t0t4e-aq296</a></li> <li>Martin, Alain J. (1984) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20161130-142130832">On David Gries's plateau problem</a>; ACM SIGSOFT Software Engineering Notes; Vol. 9; No. 1; 29-30; <a href="https://doi.org/10.1145/1005968.1005974">10.1145/1005968.1005974</a></li> <li>Chandy, K. M. and Martin, A. J. (1983) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20190111-145202534">A Characterization of Product-Form Queuing Networks</a>; Journal of the ACM; Vol. 30; No. 2; 286-299; <a href="https://doi.org/10.1145/322374.322378">10.1145/322374.322378</a></li> <li>Martin, Alain J (1983) <a href="https://resolver.caltech.edu/CaltechCSTR:1983.5075-tr-83">A General Proof Rule for Procedures in Predicate Transformer Semantics</a>; <a href="https://doi.org/10.7907/desx8-jhv04">10.7907/desx8-jhv04</a></li> <li>Martin, Alain J. (1983) <a href="https://resolver.caltech.edu/CaltechCSTR:1983.5097-tr-83">The Design of a Self-timed Circuit for Distributed Mutual Exclusion</a>; <a href="https://doi.org/10.7907/b2dbm-s0762">10.7907/b2dbm-s0762</a></li> <li>Martin, Alain J. (1982) <a href="https://resolver.caltech.edu/CaltechCSTR:1982.5047-tr-82">The torus: an exercise in constructing a processing surface</a>; <a href="https://doi.org/10.7907/cazcq-6fz54">10.7907/cazcq-6fz54</a></li> <li>Martin, Alain J. (1981) <a href="https://resolver.caltech.edu/CaltechCSTR:1982.5046-tr-82">An Axiomatic Definition of Synchronization Primitives</a>; Acta Informatica; Vol. 16; No. 2; 219-235; <a href="https://doi.org/10.1007/BF00261260">10.1007/BF00261260</a></li> <li>Martin, A. J. (1980) <a href="https://resolver.caltech.edu/CaltechAUTHORS:20120418-114041991">A Distributed Implementation Method for Parallel Programming</a>; <a href="https://doi.org/10.7907/c1h76-gdn90">10.7907/c1h76-gdn90</a></li> </ul>