@other{https://thesis.library.caltech.edu/id/eprint/7968,
    authors = "Chang, Xiaofei",
    title = "Resetting Asynchronous QDI Systems",
    year = "2014",
    url = "https://resolver.caltech.edu/CaltechTHESIS:10042013-160844239",
    id = "https://thesis.library.caltech.edu/id/eprint/7968",
    doi = "10.7907/RNGK-RV18"
}


@other{https://thesis.library.caltech.edu/id/eprint/7925,
    authors = "Keller, Sean Jason",
    title = "Robust Near-Threshold QDI Circuit Analysis and Design",
    year = "2014",
    url = "https://resolver.caltech.edu/CaltechTHESIS:08172013-192316055",
    id = "https://thesis.library.caltech.edu/id/eprint/7925",
    doi = "10.7907/79EJ-Q945"
}


@other{https://thesis.library.caltech.edu/id/eprint/2118,
    authors = "Prakash, Piyush",
    title = "Throughput Optimization of Quasi Delay Insensitive Circuits via Slack Matching",
    year = "2008",
    url = "https://resolver.caltech.edu/CaltechETD:etd-05262008-234258",
    id = "https://thesis.library.caltech.edu/id/eprint/2118",
    doi = "10.7907/9HMY-RR92"
}


@other{https://thesis.library.caltech.edu/id/eprint/5260,
    authors = "Jang, Wonjin",
    title = "Soft-Error Tolerant Quasi Delay-insensitive Circuits",
    year = "2008",
    url = "https://resolver.caltech.edu/CaltechETD:etd-11092007-180524",
    id = "https://thesis.library.caltech.edu/id/eprint/5260",
    doi = "10.7907/ZVFF-WE07"
}


@other{https://thesis.library.caltech.edu/id/eprint/155,
    authors = "Papadantonakis, Karl Spyros",
    title = "Rigorous Analog Verification of Asynchronous Circuits",
    year = "2006",
    url = "https://resolver.caltech.edu/CaltechETD:etd-01132006-152609",
    id = "https://thesis.library.caltech.edu/id/eprint/155",
    doi = "10.7907/4R8F-WF03"
}


@other{https://thesis.library.caltech.edu/id/eprint/2151,
    authors = "Prakash, Piyush",
    title = "Slack Matching",
    year = "2005",
    url = "https://resolver.caltech.edu/CaltechETD:etd-05272005-134017",
    id = "https://thesis.library.caltech.edu/id/eprint/2151",
    doi = "10.7907/g43p-hv51"
}


@other{https://thesis.library.caltech.edu/id/eprint/5393,
    authors = "Wong, Catherine Grace",
    title = "High-Level Synthesis and Rapid Prototyping of Asynchronous VLSI Systems",
    year = "2004",
    url = "https://resolver.caltech.edu/CaltechTHESIS:11192009-161338958",
    id = "https://thesis.library.caltech.edu/id/eprint/5393",
    doi = "10.7907/5N2N-0W58"
}


@other{https://thesis.library.caltech.edu/id/eprint/6263,
    authors = "Pénzes, Paul Ivan",
    title = "Energy-Delay Complexity of Asynchronous Circuits",
    year = "2002",
    url = "https://resolver.caltech.edu/CaltechTHESIS:03022011-131111881",
    id = "https://thesis.library.caltech.edu/id/eprint/6263",
    doi = "10.7907/9jpj-5s67"
}


@other{https://thesis.library.caltech.edu/id/eprint/4357,
    authors = "Ginis, Roman",
    title = "Automating Resource Management for Distributed Business Processes",
    year = "2002",
    url = "https://resolver.caltech.edu/CaltechETD:etd-11012005-093745",
    id = "https://thesis.library.caltech.edu/id/eprint/4357",
    doi = "10.7907/9GXT-BD03"
}


@other{https://thesis.library.caltech.edu/id/eprint/3193,
    authors = "Papadantonakis, Karl Spyros",
    title = {What is "Deterministic CHP", and is "Slack Elasticity" That Useful?},
    year = "2002",
    url = "https://resolver.caltech.edu/CaltechETD:etd-08222002-122806",
    id = "https://thesis.library.caltech.edu/id/eprint/3193",
    doi = "10.7907/PCCK-CS43"
}


@other{https://thesis.library.caltech.edu/id/eprint/6147,
    authors = "Nyström, Mika",
    title = "Asynchronous Pulse Logic",
    year = "2001",
    url = "https://resolver.caltech.edu/CaltechTHESIS:10152010-145548970",
    id = "https://thesis.library.caltech.edu/id/eprint/6147",
    doi = "10.7907/B107-MW15"
}


@other{https://thesis.library.caltech.edu/id/eprint/3095,
    authors = "Manohar, Rajit",
    title = "The impact of asynchrony on computer architecture",
    year = "1999",
    url = "https://resolver.caltech.edu/CaltechETD:etd-08112005-114144",
    id = "https://thesis.library.caltech.edu/id/eprint/3095",
    doi = "10.7907/xzwa-p598"
}


@other{https://thesis.library.caltech.edu/id/eprint/4110,
    authors = "Van der Goot, Marcel Rene",
    title = "Semantics of VLSI synthesis",
    year = "1995",
    url = "https://resolver.caltech.edu/CaltechETD:etd-10162007-093427",
    id = "https://thesis.library.caltech.edu/id/eprint/4110",
    doi = "10.7907/SR5V-KT18"
}


@other{https://thesis.library.caltech.edu/id/eprint/4258,
    authors = "Tierno, Jose Andres",
    title = "An energy-complexity model for VLSI computations",
    year = "1995",
    url = "https://resolver.caltech.edu/CaltechETD:etd-10252007-094408",
    id = "https://thesis.library.caltech.edu/id/eprint/4258",
    doi = "10.7907/PP38-4935"
}


@other{https://thesis.library.caltech.edu/id/eprint/4136,
    authors = "Lee, Tak Kwan",
    title = "A General Approach to Performance Analysis and Optimization of Asynchronous Circuits",
    year = "1995",
    url = "https://resolver.caltech.edu/CaltechETD:etd-10172007-090528",
    id = "https://thesis.library.caltech.edu/id/eprint/4136",
    doi = "10.7907/ehzs-y537"
}


@other{https://thesis.library.caltech.edu/id/eprint/2955,
    authors = "Hazewindus, Pieter Johannes",
    title = "Testing delay-insensitive circuits",
    year = "1992",
    url = "https://resolver.caltech.edu/CaltechETD:etd-07202007-132706",
    id = "https://thesis.library.caltech.edu/id/eprint/2955",
    doi = "10.7907/0d7v-9d09"
}


@other{https://thesis.library.caltech.edu/id/eprint/2835,
    authors = "Burns, Steven Morgan",
    title = "Performance analysis and optimization of asynchronous circuits",
    year = "1991",
    url = "https://resolver.caltech.edu/CaltechETD:etd-07092007-072640",
    id = "https://thesis.library.caltech.edu/id/eprint/2835",
    doi = "10.7907/kez1-7q52"
}


@other{https://thesis.library.caltech.edu/id/eprint/6868,
    authors = "Burch, Jerry R.",
    title = "A Comparison of Strict and Non-Strict Semantics for Lists",
    year = "1988",
    url = "https://resolver.caltech.edu/CaltechTHESIS:03262012-113851465",
    id = "https://thesis.library.caltech.edu/id/eprint/6868",
    doi = "10.7907/01bb-3j05"
}


@other{https://thesis.library.caltech.edu/id/eprint/1023,
    authors = "Li, Peyyun Peggy",
    title = "A Parallel Execution Model for Logic Programming",
    year = "1986",
    url = "https://resolver.caltech.edu/CaltechETD:etd-03192008-143903",
    id = "https://thesis.library.caltech.edu/id/eprint/1023",
    doi = "10.7907/2ngs-bp80"
}