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    title = "The impact of asynchrony on computer architecture",
    url = "https://resolver.caltech.edu/CaltechCSTR:1998.cs-tr-98-12",
    id = "record",
    doi = "10.7907/kgstw-em803"
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    title = "Mach-Based Channel Library",
    url = "https://resolver.caltech.edu/CaltechCSTR:1994.cs-tr-94-15",
    id = "record",
    doi = "10.7907/Z9SJ1HMH"
}


@other{https://resolver.caltech.edu/CaltechCSTR:1995.cs-tr-95-09,
    title = "Folded FIFOs",
    url = "https://resolver.caltech.edu/CaltechCSTR:1995.cs-tr-95-09",
    id = "record",
    doi = "10.7907/Z9J67DZD"
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    title = "Quasi-Delay-Insensitive Circuits are Turing-Complete",
    url = "https://resolver.caltech.edu/CaltechCSTR:1995.cs-tr-95-11",
    id = "record",
    doi = "10.7907/Z9H70CV1"
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@other{https://resolver.caltech.edu/CaltechCSTR:1994.cs-tr-94-12,
    title = "Theory and Use of Conditional Composition",
    url = "https://resolver.caltech.edu/CaltechCSTR:1994.cs-tr-94-12",
    id = "record",
    doi = "10.7907/Z9VD6WGD"
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@other{https://resolver.caltech.edu/CaltechCSTR:1994.cs-tr-94-08,
    title = "Integrating Task and Data Parallelism with the Collective Communication Archetype",
    url = "https://resolver.caltech.edu/CaltechCSTR:1994.cs-tr-94-08",
    id = "record",
    doi = "10.7907/Z9222RSP"
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    title = "Composing Processes Using Modified Rely-Guarantee Specifications",
    url = "https://resolver.caltech.edu/CaltechCSTR:1996.cs-tr-96-22",
    id = "record",
    doi = "10.7907/Z9P848X3"
}