[
    {
        "id": "authors:346am-zg678",
        "collection": "authors",
        "collection_id": "346am-zg678",
        "cite_using_url": "https://resolver.caltech.edu/CaltechAUTHORS:20121213-093659505",
        "type": "article",
        "title": "Silicon Nanowire Charge-Trap Memory Incorporating Self-Assembled Iron Oxide Quantum Dots",
        "author": [
            {
                "family_name": "Huang",
                "given_name": "Ruo-Gu",
                "clpid": "Huang-Ruo-Gu"
            },
            {
                "family_name": "Heath",
                "given_name": "James R.",
                "orcid": "0000-0001-5356-4385",
                "clpid": "Heath-J-R"
            }
        ],
        "abstract": "Charge-trap non-volatile memory devices based upon the precise integration of quantum dot storage elements with silicon nanowire field-effect transistors are described. Template-assisted assembly yields an ordered array of FeO QDs within the trenches that separate highly aligned SiNWs, and injected charges are reversibly stored via Fowler\u2013Nordheim tunneling into the QDs. Stored charges shift the transistor threshold voltages, providing the basis for a memory device. Quantum dot size is found to strongly influence memory performance metrics.",
        "doi": "10.1002/smll.201200940",
        "issn": "1613-6810",
        "publisher": "Wiley",
        "publication": "Small",
        "publication_date": "2012-11-19",
        "series_number": "22",
        "volume": "8",
        "issue": "22",
        "pages": "3417-3421"
    },
    {
        "id": "authors:2bed4-70141",
        "collection": "authors",
        "collection_id": "2bed4-70141",
        "cite_using_url": "https://resolver.caltech.edu/CaltechAUTHORS:20111213-071827066",
        "type": "article",
        "title": "High Performance Ring Oscillators from 10-nm Wide Silicon\n Nanowire Field-Effect Transistors",
        "author": [
            {
                "family_name": "Huang",
                "given_name": "Ruo-Gu",
                "clpid": "Huang-Ruo-Gu"
            },
            {
                "family_name": "Tham",
                "given_name": "Douglas",
                "clpid": "Tham-Douglas"
            },
            {
                "family_name": "Wang",
                "given_name": "Dunwei",
                "clpid": "Wang-Dunwei"
            },
            {
                "family_name": "Heath",
                "given_name": "James R.",
                "orcid": "0000-0001-5356-4385",
                "clpid": "Heath-J-R"
            }
        ],
        "abstract": "We explore 10-nm wide Si nanowire (SiNW) field-effect transistors (FETs) for logic applications, via the fabrication\nand testing of SiNW-based ring oscillators. We report on SiNW surface treatments and dielectric annealing, for\nproducing SiNW FETs that exhibit high performance in terms of large on/off-state current ratio (~10^8), low\ndrain-induced barrier lowering (~30 mV) and low subthreshold swing (~80 mV/decade). The performance of\ninverter and ring-oscillator circuits fabricated from these nanowire FETs are also explored. The inverter\ndemonstrates the highest voltage gain (~148) reported for a SiNW-based NOT gate, and the ring oscillator\nexhibits near rail-to-rail oscillation centered at 13.4 MHz. The static and dynamic characteristics of these NW\ndevices indicate that these SiNW-based FET circuits are excellent candidates for various high-performance\nnanoelectronic applications.",
        "doi": "10.1007/s12274-011-0157-2",
        "issn": "1998-0124",
        "publisher": "Springer Verlag",
        "publication": "Nano Research",
        "publication_date": "2011-10",
        "series_number": "10",
        "volume": "4",
        "issue": "10",
        "pages": "1005-1012"
    }
]