Phased arrays provide high gain electronically steerable beams and are powerful systems for sensing and communication. Existing phased arrays are typically small, rigid, and planar which limits their possible use cases. This thesis describes the author’s contributions to the creation of novel phased array architectures which can enable new phased array systems and applications. The first chapter describes the design, testing, and use of the scalable router. Scalable routers are a time delay array relay used to reroute signals a microwave frequencies. The second chapter describes the development of large scale flexible phased arrays, first in the context the Caltech Space Solar Power Project, and then in an exploration of a technique for determining the shape of arrays using only mutual coupling between elements. Finally, a guide for developing electronics for academic space payloads is included as an appendix.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/qzj9-rz93, author = {Porsandeh Khial, Parham}, title = {High Sensitivity Time-Varying Systems In Photonics and Electronics}, school = {California Institute of Technology}, year = {2022}, doi = {10.7907/qzj9-rz93}, url = {https://resolver.caltech.edu/CaltechTHESIS:09242021-181127485}, abstract = {Integrated electronics and photonics have been revolutionizing our daily lives for decades. However, the demand for high-speed communications, low-latency networks, and high-performance optical and electrical sensors continues to grow. In order to keep up with this demand as well as be able to address upcoming and unknown challenges, we need to explore unconventional solutions. Moving away from existing systems and traditional architectures allows us to take a deeper look at these challenges and potentially come up with nontrivial answers. In this thesis, unconventional approaches to implementing high-performance optical and electrical sensors and systems are investigated. Among these unorthodox solutions are time-varying architectures which led to completely new devices, sensors with dramatically improved sensitivity, and the breaking of known trade-offs.
By developing a time-varying method that we call reciprocal sensitivity enhancement, we demonstrated a nanophotonic optical gyroscope (NOG) for the first time. The efficacy of this method is borne out by its ability to improve the performance of optical gyroscopes by two orders of magnitude. This sensitivity-enhancement method filters out reciprocal imperfections and noise, thereby increasing the overall signal-to-noise ratio. Next, the same approach is used to boost the performance of resonance-based magnetic biosensors. By merging two biosensors and taking advantage of the frequency response of magnetic beads, time-division switching cancels out most of the correlated noise. This solution pushes the sensitivity of this sensor below parts-per-million (PPM) levels for long periods of time — a property which is desirable in many biosensing applications.
Additionally, an electrical scalable router that mitigates line-of-sight issues in next-generation wireless systems is introduced. This novel design does not require any shared timing reference to form a coherent array and uses a time-varying baseband to create a proper true-time delay. Next, we discuss how radiating elements in silicon-photonics platforms can be engineered to create a passive lensless camera. By applying a robust reconstruction algorithm, the captured image can be faithfully recovered. The same concept can be used in multi-mode nanophotonic antennas to alleviate the field-of-view (FOV)-aperture trade-off.
Finally, a hybrid photonic transmitter/receiver architecture, an electrical full-duplex transceiver with one nonreciprocal element, and a nested-ring optical modulator are presented.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/r6f1-zq65, author = {Williams, David Elliott}, title = {Shape-Changing Phased Arrays}, school = {California Institute of Technology}, year = {2022}, doi = {10.7907/r6f1-zq65}, url = {https://resolver.caltech.edu/CaltechTHESIS:03312022-192034489}, abstract = {Historically, increasing the degrees of freedom in electromagnetic structures has revolutionized the capabilities of wireless systems and introduced new applications. While research on phased arrays has explored everything from antenna drive settings to the element placement, the array geometry is assumed to be a fixed parameter. This thesis summarizes the author’s work developing shape-changing phased arrays. It demonstrates the fundamental trade-off between gain and steering range for a given geometry. Measurements of the first shape-changing phased array both verify this theory and demonstrate the ability to break this trade-off using geometric reconfiguration. In addition, the mathematical consequences of shape-change and their impact on the arrays electromagnetic properties are discussed. Programmable passive switching networks on flexible sheets embedded in the array are proposed to address these challenges. The ability of these structures to enhance array performance is demonstrated by in-situ optimization experiments on a demonstration array. The associated optimization problem is characterized with a statistical analysis on a simulated array. Finally, avenues for further research are proposed.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/7e5p-9r23, author = {Fatemi, Seyed Mohammadreza}, title = {Active Flat Optics Wavefront Manipulation for Imaging, Ranging, and Sensing}, school = {California Institute of Technology}, year = {2021}, doi = {10.7907/7e5p-9r23}, url = {https://resolver.caltech.edu/CaltechTHESIS:09182020-074010855}, abstract = {The emergence and maturity of integrated photonic platforms over the past decade allowed for reliable integration of a large number of photonic components on a single substrate. This ability to process and control coherent light on a chip is a potential pathway for the realization of novel low-cost systems capable of non-conventional functionalities for optical wavefront engineering. In this thesis, integrated active flat optics architectures for generation, manipulation, and reception of optical wavefronts are investigated. In particular, the application of such systems for imaging, ranging, and sensing are studied and multiple photonic systems including a large scale transmitter, a high-sensitivity receiver, and a high-resolution transceiver are demonstrated.
For generation of optical wavefronts, solutions for engineering a radiative optical waveform via emission by an array of nano-photonic antennas are studied and a chip-scale photonic transmitter is implemented. The transmitter forms an optical phased array with a novel architecture in a CMOS compatible silicon photonics process which not only dispenses with the limitations of previously demonstrated systems but also yields a narrower beamwidth leading to a higher resolution. Moreover, an integrated adaptive flat optical receiver architecture that collects samples of the incident light and processes it on-chip with high detection sensitivity is implemented. To detect the optical samples with a high signal to noise ratio, an optoelectronic mixer is proposed and designed that down-converts the optical signals received by each antenna to a radio frequency signal in the electronic domain, provides conversion gain, and rejects interferers. This system allows arbitrary wavefront manipulation of the received signal by adapting itself to new conditions — a capability that does not exist in conventional cameras. Using this system, we realized the first high-sensitivity optical phased array receivers with one-dimensional and two-dimensional apertures and the functionality of the chips as ultra-thin lens-less cameras were demonstrated. To achieve a high-resolution integrated photonic 3D imager with low system complexity, a double spectral sampling method is developed through a special wavefront sampling arrangement on the transmitter and receiver apertures. This transceiver architecture includes a multi-beam transmitter and a high-sensitivity receiver that can distinguish the illuminated points separately and process them simultaneously using a digital signal processor.
Moreover, novel ultra-low power architectures for generation and reception of short RF/microwave pulses are explored. Such systems have a broad range of applications including imaging and ranging. In this study, the capability of generating and receiving orthogonal Hermite pulses of various orders using a capacitor-only time-varying network is demonstrated.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/xjby-xn13, author = {Khachaturian, Aroutin}, title = {Large-Scale Photonics Integration: Data Communications to Optical Beamforming}, school = {California Institute of Technology}, year = {2021}, doi = {10.7907/xjby-xn13}, url = {https://resolver.caltech.edu/CaltechTHESIS:02162021-124026838}, abstract = {Integrated photonics is an emerging technology that has begun to transform our way of life with the same amount of impact that integrated CMOS electronics has. Currently, photonics integration is orders of magnitude less complicated than its electronics counterparts. Nonetheless, it serves as one of the main driving forces to meet the exponentially increasing demand for high-speed and low-cost data transfer in the Information Age. It also promises to provide solutions for next-generation high-sensitivity image sensors and precision metrology and spectroscopy instruments. In this thesis, integrated photonics architectures for solid-state photonic beamforming and processing are investigated for high-resolution and high sensitivity lens-free transceiver applications. Furthermore, high-efficiency integrated electro-optical modulators aiming to meet the demand of high-density photonic integration with improved modulation efficiency, small footprint, and lower insertion loss are investigated.
Two integrated photonic solid-state beamforming architectures incorporating two-dimensional apertures are explored. First, a novel transceiver architecture for remote sensing, coherent imaging, and ranging applications is demonstrated. It reduces system implementation complexity and offers a methodology for very-large-scale coherent transceiver beamforming applications. Next, a transmitter beamforming architecture inspired by the diffraction pattern of the slit annular ring is analyzed and demonstrated. This transceiver architecture can be used for coherent beamforming applications such as imaging and point-to-point optical communication. Finally, a coherent imager architecture for high-sensitivity three-dimensional imaging and remote-sensing applications is present. This novel architecture can suppress undesired phase fluctuations of the optical carrier signal in the illumination and reference paths, providing higher resolution and higher acquisition speed than previous implementations.
Moreover, several compact, high-speed CMOS compatible modulators that enable high-density photonic integration are explored. Ultra-compact and low insertion loss silicon-organic-hybrid modulators are designed and implemented for high-speed beamforming and high-efficiency complex signal modulation applications. Finally, a novel integrated nested-ring assisted modulator topology is analyzed and implemented for high-density and high modulation efficiency applications.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/t3cz-c785, author = {Gal-Katziri, Matan}, title = {Precision at Scale: System Design from Tiny Biosensors to Giant Arrays}, school = {California Institute of Technology}, year = {2021}, doi = {10.7907/t3cz-c785}, url = {https://resolver.caltech.edu/CaltechTHESIS:08172020-115024354}, abstract = {In order to change the world, technological advancements must be made affordable and available for the general public to use. In other words, we must be able to scale our inventions effectively. Silicon integrated circuits are crucial components in scaling electronic systems because they are mass producible and offer a phenomenal cost-to-complexity ratio. This thesis summarizes the author’s work on highly scalable sensor and array systems. It presents three high precision systems, that demonstrate how the use of highly functional radio-frequency integrated circuits enables the realization of previously unfeasible architectures.}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/W0A7-4258, author = {Hong, Brian Daffern}, title = {Periodically Disturbed Oscillators}, school = {California Institute of Technology}, year = {2019}, doi = {10.7907/W0A7-4258}, url = {https://resolver.caltech.edu/CaltechTHESIS:07262018-030251324}, abstract = {By controlling the timing of events and enabling the transmission of data over long distances, oscillators can be considered to generate the “heartbeat” of modern electronic systems. Their utility, however, is boosted significantly by their peculiar ability to synchronize to external signals that are themselves periodic in time. Although this fascinating phenomenon has been studied by scientists since the 1600s, models for describing this behavior have seen a disconnect between the rigorous, methodical approaches taken by mathematicians and the design-oriented, physically-based analyses carried out by engineers. While the analytical power of the former is often concealed by an inundation of abstract mathematical machinery, the accuracy and generality of the latter are constrained by the empirical nature of the ensuing derivations. We hope to bridge that gap here.
In this thesis, a general theory of electrical oscillators under the influence of a periodic injection is developed from first principles. Our approach leads to a fundamental yet intuitive understanding of the process by which oscillators lock to a periodic injection, as well as what happens when synchronization fails and the oscillator is instead injection pulled. By considering the autonomous and periodically time-varying nature that underlies all oscillators, we build a time-synchronous model that is valid for oscillators of any topology and periodic disturbances of any shape. A single first-order differential equation is shown to be capable of making accurate, quantitative predictions about a wide array of properties of periodically disturbed oscillators: the range of injection frequencies for which synchronization occurs, the phase difference between the injection and the oscillator under lock, stable vs. unstable modes of locking, the pull-in process toward lock, the dynamics of injection pulling, as well as phase noise in both free-running and injection-locked oscillators. The framework also naturally accommodates superharmonic injection-locked frequency division, subharmonic injection-locked frequency multiplication, and the general case of an arbitrary rational relationship between the injection and oscillation frequencies. A number of novel insights for improving the performance of systems that utilize injection locking are also elucidated. In particular, we explore how both the injection waveform and the oscillator’s design can be modified to optimize the lock range. The resultant design techniques are employed in the implementation of a dual-moduli prescaler for frequency synthesis applications which features low power consumption, a wide operating range, and a small chip area.
For the commonly used inductor-capacitor (LC) oscillator, we make a simple modification to our framework that takes the oscillation amplitude into account, greatly enhancing the model’s accuracy for large injections. The augmented theory uniquely captures the asymmetry of the lock range as well as the distinct characteristics exhibited by different types of LC oscillators. Existing injection locking and pulling theories in the available literature are subsumed as special cases of our model. It is important to note that even though the veracity of our theoretical predictions degrades as the size of the injection grows due to our framework’s linearization with respect to the disturbance, our model’s validity across a broad range of practical injection strengths are borne out by simulations and measurements on a diverse collection of integrated LC, ring, and relaxation oscillators. Lastly, we also present a phasor-based analysis of LC and ring oscillators which yields a novel perspective into how the injection current interacts with the oscillator’s core nonlinearity to facilitate injection locking.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/MNYK-Y158, author = {Abiri, Behrooz}, title = {Silicon Integrated Arrays: From Microwave to IR}, school = {California Institute of Technology}, year = {2018}, doi = {10.7907/MNYK-Y158}, url = {https://resolver.caltech.edu/CaltechTHESIS:06042018-194533722}, abstract = {Integrated chips have enabled realization and mass production of complex systems in a small form factor. Through process miniaturization many novel applications in silicon photonics and electronic systems have been enabled. In this thesis I have provided several examples of innovations that are only enabled by integration. I have also demonstrated how electronics and photonics circuits can complement each other to achieve a system with superior performance.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/Z9RN35XW, author = {Sideris, Constantine}, title = {Electromagnetic Field Manipulation: Biosensing to Antennas}, school = {California Institute of Technology}, year = {2017}, doi = {10.7907/Z9RN35XW}, url = {https://resolver.caltech.edu/CaltechTHESIS:06082017-193807440}, abstract = {We will explore how understanding and controlling electromagnetic fields can provide significant impact across a multitude of applications throughout the whole frequency spectrum from DC to daylight. Starting from the DC end of the electromagnetic spectrum, we motivate the design of a new integrated magnetic biosensing design as well as various improvements to the initial design based on spatial and temporal manipulations of the magnetic fields. Next, we look into the RF domain and develop maximal performance bounds for antennas and other electromagnetic structures. We develop rapid simulation techniques which when coupled with heuristic optimization algorithms can quickly and effectively produce new antenna structures with little to no manual intervention. We demonstrate the efficacy of these techniques in the context of on-chip antenna designs and a 3D printed coupling antenna for a dielectric waveguide communication link. We present the design of a 120GHz dual-channel 100Gbps QPSK/64QAM transceiver IC developed in a standard 28nm bulk CMOS process. Finally, we explore the higher THz regime in the context of photonic device optimization. We optimize compact photonic multiplexer devices which are fabricated in a standard foundry process and evaluate their performance against simulation results.}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/Z9DR2SJZ, author = {Safaripour Tabbalvandani, Amirreza}, title = {Proximal-Field Radiation Sensors for Dynamically Controllable and Self-Correcting Integrated Radiators}, school = {California Institute of Technology}, year = {2017}, doi = {10.7907/Z9DR2SJZ}, url = {https://resolver.caltech.edu/CaltechTHESIS:05162017-205230203}, abstract = {One of the major challenges in the design of integrated radiators at mm-wave frequencies is the generation of surface waves in the dielectric substrate by the on-chip antennas. Since dielectric substrates are excellent surface waveguides with a fundamental mode with no cutoff frequency, there is always some energy trapped in them due to the surface waves and the excited substrate modes. This phenomenon is a significant cause of reduced radiation efficiency for mm-wave integrated radiators. However, in this thesis, we use this as an opportunity. We show that the excited substrate modes in the dielectric substrate of an integrated antenna contain valuable information regarding its far-field radiation properties. We introduce Proximal-Field Radiation Sensors (PFRS) as a number of small sensing antennas that are placed strategically on the same substrate as the integrated antenna and measure electromagnetic waves in its immediate proximity. These sensors extract the existing information in the substrate modes and use it to predict the far-field radiation properties of the integrated antenna in real-time based on in-situ measurements in the close proximity of the antennas, without any need to use additional test equipment and without removing the antenna from its operating environment or interfering with its operation in a wireless system. In other words, PFRS enables self-calibration, self-correction, and self-monitoring of the performance of the integrated antennas. Design intuition and a variety of data processing schemes for these sensors are discussed. Two proof-of-concept prototypes are fabricated on printed circuit board (PCB) and integrated circuit (IC) and both verify PFRS capabilities in prediction of radiation properties solely based on in-situ measurements.
Dynamically controllable integrated radiators would significantly benefit from PFRS, These radiators are capable of controlling their radiation parameters such as polarization and beam steering angle through their actuators and control units. In these cases, PFRS serves as a tool for real-time monitoring of their radiation parameters, so that without direct measurement of the far-field properties through bulky equipment the required information for the control units and the actuators are provided.
Dynamically controllable integrated radiators can be designed using the additional design space provided by Multi-Port Driven (MPD) radiator methodology. After a review of advantages of MPD design over the traditional single-port design, we show that a slot-based MPD radiator would have the additional advantage of reduced exclusive use area compared to the original wire-based MPD radiator, through demonstration of a 134.5-GHz integrated slot-based MPD radiator with a measured single-element EIRP of +6.0 dBm and a total radiated power of -1.3 dBm.
We discuss how MPD methodology enables the new concept of Dynamic Polarization Control, as a method to ensure polarization matching of the transmitter antenna to the receiver antenna, regardless of the polarization and orientation of the receiver antenna in space. A DPC antenna design using the MPD methodology is described and a 105.5-GHz 2x1 integrated DPC radiator array with a maximum EIRP of +7.8 dBm and a total radiated power of 0.9 mW is presented as the first demonstration of an integrated radiator with DPC capability. This prototype can control the polarization angle across the entire tuning range of 0 to 180 degrees while maintaining axial ratios above 10 dB, and control the axial ratio from 2.4 dB (near circular) to 14 dB (linear). We also demonstrate how simultaneous two-dimensional beam steering and DPC capabilities can even match the polarization to a mobile receiver antenna through a prototype 123-GHz 2x2 integrated DPC radiator array with a maximum EIRP of +12.3 dBm, polarization angle control across the full range of 0to 180 degrees as well as tunable axial ratio down to 1.2 dB and beam steering of up to 15 degrees in both dimensions. We also use slot-based DPC antennas to fabricate a 120-GHz integrated slot-based DPC radiator array, expected to have a maximum EIRP of +15.5 dBm.
We also introduce a new modulation scheme called Polarization Modulation (Pol-M) as a result of DPC capability, where the polarization itself is used for encoding the data. Pol-M is a spatial modulation method and is orthogonal to the existing phase and amplitude modulation schemes. Thus, it could be added on top of those schemes to enable creation of 4-D data constellations, or it can be used as the only basis for modulation to increase the stream security by misleading the undesired receivers. We discuss how DPC antenna enables Pol-M and also present PCB prototypes for Pol-M transmitter and receiver units operating at 2.4 GHz.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/Z9HQ3WTR, author = {Dasgupta, Kaushik}, title = {Self-Healing Techniques for RF and mm-Wave Transmitters and Receivers}, school = {California Institute of Technology}, year = {2015}, doi = {10.7907/Z9HQ3WTR}, url = {https://resolver.caltech.edu/CaltechTHESIS:10282014-113257585}, abstract = {
With continuing advances in CMOS technology, feature sizes of modern Silicon chip-sets have gone down drastically over the past decade. In addition to desktops and laptop processors, a vast majority of these chips are also being deployed in mobile communication devices like smart-phones and tablets, where multiple radio-frequency integrated circuits (RFICs) must be integrated into one device to cater to a wide variety of applications such as Wi-Fi, Bluetooth, NFC, wireless charging, etc. While a small feature size enables higher integration levels leading to billions of transistors co-existing on a single chip, it also makes these Silicon ICs more susceptible to variations. A part of these variations can be attributed to the manufacturing process itself, particularly due to the stringent dimensional tolerances associated with the lithographic steps in modern processes. Additionally, RF or millimeter-wave communication chip-sets are subject to another type of variation caused by dynamic changes in the operating environment. Another bottleneck in the development of high performance RF/mm-wave Silicon ICs is the lack of accurate analog/high-frequency models in nanometer CMOS processes. This can be primarily attributed to the fact that most cutting edge processes are geared towards digital system implementation and as such there is little model-to-hardware correlation at RF frequencies.
All these issues have significantly degraded yield of high performance mm-wave and RF CMOS systems which often require multiple trial-and-error based Silicon validations, thereby incurring additional production costs. This dissertation proposes a low overhead technique which attempts to counter the detrimental effects of these variations, thereby improving both performance and yield of chips post fabrication in a systematic way. The key idea behind this approach is to dynamically sense the performance of the system, identify when a problem has occurred, and then actuate it back to its desired performance level through an intelligent on-chip optimization algorithm. We term this technique as self-healing drawing inspiration from nature’s own way of healing the body against adverse environmental effects. To effectively demonstrate the efficacy of self-healing in CMOS systems, several representative examples are designed, fabricated, and measured against a variety of operating conditions.
We demonstrate a high-power mm-wave segmented power mixer array based transmitter architecture that is capable of generating high-speed and non-constant envelope modulations at higher efficiencies compared to existing conventional designs. We then incorporate several sensors and actuators into the design and demonstrate closed-loop healing against a wide variety of non-ideal operating conditions. We also demonstrate fully-integrated self-healing in the context of another mm-wave power amplifier, where measurements were performed across several chips, showing significant improvements in performance as well as reduced variability in the presence of process variations and load impedance mismatch, as well as catastrophic transistor failure. Finally, on the receiver side, a closed-loop self-healing phase synthesis scheme is demonstrated in conjunction with a wide-band voltage controlled oscillator to generate phase shifter local oscillator (LO) signals for a phased array receiver. The system is shown to heal against non-idealities in the LO signal generation and distribution, significantly reducing phase errors across a wide range of frequencies.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/Z9NC5Z5M, author = {Pai, Alex Hao-Yu}, title = {Sensing and Actuation from Biology to Electronics}, school = {California Institute of Technology}, year = {2015}, doi = {10.7907/Z9NC5Z5M}, url = {https://resolver.caltech.edu/CaltechTHESIS:05302015-005943888}, abstract = {We introduce an in vitro diagnostic magnetic biosensing platform for immunoassay and nucleic acid detection. The platform has key characteristics for a point-of-use (POU) diagnostic: portability, low-power consumption, low cost, and multiplexing capability. As a demonstration of capabilities, we use this platform for the room temperature, amplification-free detection of a 31 bp DNA oligomer and interferon-gamma (a protein relevant for tuberculosis diagnosis). Reliable assay measurements down to 100 pM for the DNA and 1 pM for the protein are demonstrated. We introduce a novel “magnetic freezing” technique for baseline measurement elimination and to enable spatial multiplexing. We have created a general protocol for adapting integrated circuit (IC) sensors to any of hundreds of commercially available immunoassay kits and custom designed DNA sequences.
We also introduce a method for immunotherapy treatment of malignant gliomas. We utilize leukocytes internalized with immunostimulatory nanoparticle-oligonucleotide conjugates to localize and retain immune cells near the tumor site. As a proof-of-principle, we develop a novel cell imaging and incubation chamber for in vitro magnetic motility experiments. We use the apparatus to demonstrate the controlled movement of magnetically loaded THP-1 leukocytes.
Finally, we introduce an IC transmitter and power ampli er (PA) that utilizes electronic digital infrastructure, sensors, and actuators to self-heal and adapt to process, dynamic, and environmental variation. Traditional IC design has achieved incredible degrees of reliability by ensuring that billions of transistors on a single IC die are all simultaneously functional. Reliability becomes increasingly difficult as the size of a transistor shrinks. Self-healing can mitigate these variations.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/Z9MP518K, author = {Bowers, Steven Michael}, title = {Dynamically Controllable Integrated Radiation and Self-Correcting Power Generation in mm-Wave Circuits and Systems}, school = {California Institute of Technology}, year = {2014}, doi = {10.7907/Z9MP518K}, url = {https://resolver.caltech.edu/CaltechTHESIS:10102013-145125571}, abstract = {This thesis presents novel design methodologies for integrated radiators and power generation at mm-wave frequencies that are enabled by the continued integration of various electronic and electromagnetic (EM) structures onto the same substrate. Beginning with the observation that transistors and their connections to EM radiating structures on an integrated substrate are essentially free, the concept of multi-port driven (MPD) radiators is introduced, which opens a vast design space that has been generally ignored due to the cost structure associated with discrete components that favors fewer transistors connected to antennas through a single port.
From Maxwell’s equations, a new antenna architecture, the radial MPD antennas based on the concept of MPD radiators, is analyzed to gain intuition as to the important design parameters that explain the wide-band nature of the antenna itself. The radiator is then designed and implemented at 160 GHz in a 0.13 um SiGe BiCMOS process, and the single element design has a measured effective isotropic radiated power (EIRP) of +4.6 dBm with a total radiated power of 0.63 mW.
Next, the radial MPD radiator is adapted to enable dynamic polarization control (DPC). A DPC antenna is capable of controlling its radiated polarization dynamically, and entirely electronically, with no mechanical reconfiguration required. This can be done by having multiple antennas with different polarizations, or within a single antenna that has multiple drive points, as in the case of the MPD radiator with DPC. This radiator changes its polarization by adjusting the relative phase and amplitude of its multiple ports to produce polarizations with any polarization angle, and a wide range of axial ratios. A 2x1 MPD radiator array with DPC at 105 GHz is presented whose measurements show control of the polarization angle throughout the entire 0 degree through 180 degree range while in the linear polarization mode and maintaining axial ratios above 10 dB in all cases. Control of the axial ratio is also demonstrated with a measured range from 2.4 dB through 14 dB, while maintaining a fixed polarization angle. The radiator itself has a measured maximum EIRP of +7.8 dBm, with a total radiated power of 0.9 mW, and is capable of beam steering.
MPD radiators were also applied in the domain of integrated silicon photonics. For these designs, the driver transistor circuitry was replaced with silicon optical waveguides and photodiodes to produce a 350 GHz signal. Three of these optical MPD radiator designs have been implemented as 2x2 arrays at 350 GHz. The first is a beam forming array that has a simulated gain of 12.1 dBi with a simulated EIRP of -2 dBm. The second has the same simulated performance, but includes optical phase modulators that enable two-dimensional beam steering. Finally, a third design incorporates multi-antenna DPC by combining the outputs of both left and right handed circularly polarized MPD antennas to produce a linear polarization with controllable polarization angle, and has a simulated gain of 11.9 dBi and EIRP of -3 dBm. In simulation, it can tune the polarization from 0 degrees through 180 degrees while maintaining a radiated power that has a 0.35 dB maximum deviation from the mean.
The reliability of mm-wave radiators and power amplifiers was also investigated, and two self-healing systems have been proposed. Self-healing is a global feedback method where integrated sensors detect the performance of the circuit after fabrication and report that data to a digital control algorithm. The algorithm then is capable of setting actuators that can control the performance of the mm-wave circuit and counteract any performance degradation that is observed by the sensors. The first system is for a MPD radiator array with a partially integrated self-healing system. The self-healing MPD radiator senses substrate modes through substrate mode pickup sensors and infers the far-field radiated pattern from those sensors. DC current sensors are also included to determine the DC power consumption of the system. Actuators are implemented in the form of phase and amplitude control of the multiple drive points.
The second self-healing system is a fully integrated self-healing power amplifier (PA) at 28 GHz. This system measures the output power, gain and efficiency of the PA using radio frequency (RF) power sensors, DC current sensors and junction temperature sensors. The digital block is synthesized from VHDL code on-chip and it can actuate the output power combining matching network using tunable transmission line stubs, as well as the DC operating point of the amplifying transistors through bias control. Measurements of 20 chips confirm self-healing for two different algorithms for process variation and transistor mismatch, while measurements from 10 chips show healing for load impedance mismatch, and linearity healing. Laser induced partial and total transistor failure show the benefit of self-healing in the case of catastrophic failure, with improvements of up to 3.9 dB over the default case. An exemplary yield specification shows self-healing improving the yield from 0% up through 80%.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/Q018-QP18, author = {Bohn, Florian}, title = {Integrated Circuit Signal Generation and Detection Techniques for Microwave and Sub-Millimeter Wave Signals}, school = {California Institute of Technology}, year = {2012}, doi = {10.7907/Q018-QP18}, url = {https://resolver.caltech.edu/CaltechTHESIS:01082012-184435123}, abstract = {The unabated reduction of device feature sizes in semiconductor processes, particularly in complementary metal-oxide semiconductor (CMOS) processes, has served as the enabling factor behind integrated electronic systems of ever increasing complexity and speeds. As a result, former niche market applications, such as the global-positioning system (GPS), cellular telephony or powerful general purpose computers, have expanded into the field of consumer electronics with tremendous impact on the daily lives of millions of people. It is, therefore, only logical that the future will bring new applications to the mass market that today only exist as niche applications. Systems operating in the millimeter wave frequency range are an example of a current niche market, with current research striving to fully integrate such systems using advanced semiconductor processing technology. Electromagnetic waves at these frequencies become comparable in size to the electronics circuits. This opens the possibility for novel design approaches that were traditionally not available to integrated circuit radio-frequency designers. On the other hand, the increase in the number of available devices also brings with it new challenges due to increasing variability in device performance. Self-correcting techniques for integrated circuits that offset this increased variability are therefore also highly desirable.
In this dissertation, we explore the above issues on several fronts. We will first present a phase-locked loop synthesizer that auto-corrects its spurious output tones as an example of circuits that correct for a parasitic effect by leveraging the availability of many active devices to construct a digital feedback loop. We will then focus on the effort to operate CMOS integrated circuits in the terahertz regime by developing a solid design foundation for converting signals to frequencies beyond the maximum power gain frequency〖 f〗_max. We will use the insights gained to develop and explore two designs generating power at these high frequencies as proofs of concept. Finally, we will focus on the passive electromagnetic components of such high frequency systems and present a novel way of designing electromagnetic structures that are comparable to the wavelength size in integrated systems by introducing the third physical dimension into the design process for integrated electromagnetic structures.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/MBXB-6R29, author = {Sengupta, Kaushik}, title = {Silicon-Based Terahertz Circuits and Systems}, school = {California Institute of Technology}, year = {2012}, doi = {10.7907/MBXB-6R29}, url = {https://resolver.caltech.edu/CaltechTHESIS:06112012-145654043}, abstract = {
The Terahertz frequency range, often referred to as the `Terahertz’ gap, lies wedged between microwave at the lower end and infrared at the higher end of the spectrum, occupying frequencies between 0.3-3.0 THz. For a long time, applications in THz frequencies had been limited to astronomy and chemical sciences, but with advancement in THz technology in recent years, it has shown great promise in a wide range of applications ranging from disease diagnostics, non-invasive early skin cancer detection, label-free DNA sequencing to security screening for concealed weapons and contraband detection, global environmental monitoring, nondestructive quality control and ultra-fast wireless communication. Up until recently, the terahertz frequency range has been mostly addressed by high mobility compound III-V processes, expensive nonlinear optics, or cryogenically cooled quantum cascade lasers. A low cost, room temperature alternative can enable the development of such a wide array of applications, not currently accessible due to cost and size limitations. In this thesis, we will discuss our approach towards development of integrated terahertz technology in silicon-based processes. In the spirit of academic research, we will address frequencies close to 0.3 THz as ‘Terahertz’.
In this thesis, we address both fronts of integrated THz systems in silicon: THz power generation, radiation and transmitter systems, and THz signal detection and receiver systems. THz power generation in silicon-based integrated circuit technology is challenging due to lower carrier mobility, lower cut-o frequencies compared to compound III-V processes, lower breakdown voltages and lossy passives. Radiation from silicon chip is also challenging due to lossy substrates and high dielectric constant of silicon. In this work, we propose novel ways of combining circuit and electromagnetic techniques in a holistic design approach, which can overcome limitations of conventional block-by-block or partitioned design methodology, in order to generate high-frequency signals above the classical definition of cut-off frequencies (ƒt/ƒmax). We demonstrate this design philosophy in an active electromagnetic structure, which we call Distributed Active Radiator. It is inspired by an Inverse Maxwellian approach, where instead of using classical circuit and electromagnetic blocks to generate and radiate THz frequencies, we formulate surface (metal) currents in silicon chip for a desired THz field prole and develop active means of controlling different harmonic currents to perform signal generation, frequency multiplication, radiation and lossless filtering, simultaneously in a compact footprint. By removing the articial boundaries between circuits, electromagnetics and antenna, we open ourselves to a broader design space. This enabled us to demonstrate the rst 1 mW Eective-isotropic-radiated-power(EIRP) THz (0.29 THz) source in CMOS with total radiated power being three orders of magnitude more than previously demonstrated. We also proposed a near-field synchronization mechanism, which is a scalable method of realizing large arrays of synchronized autonomous radiating sources in silicon. We also demonstrate the first THz CMOS array with digitally controlled beam-scanning in 2D space with radiated output EIRP of nearly 10 mW at 0.28 THz.
On the receiver side, we use a similar electronics and electromagnetics co-design approach to realize a 4x4 pixel integrated silicon Terahertz camera demonstrating to the best of our knowledge, the most sensitive silicon THz detector array without using post-processing, silicon lens or high-resistivity substrate options (NEP < 10 pW √ Hz at 0.26 THz). We put the 16 pixel silicon THz camera together with the CMOS DAR THz power generation arrays and demonstrated, for the first time, an all silicon THz imaging system with a CMOS source.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/WFGT-4823, author = {Keehr, Edward Arthur}, title = {Techniques for Mixed-Signal Linearization and Large Signal Handling in Radio-Frequency Receiver Circuits}, school = {California Institute of Technology}, year = {2011}, doi = {10.7907/WFGT-4823}, url = {https://resolver.caltech.edu/CaltechTHESIS:08232010-071647727}, abstract = {In this dissertation, two effective linearization schemes for radio-frequency receivers are introduced. The first of these comprises a mixed-signal feedforward path which regenerates third-order intermodulation (IM3) products at radio frequencies, downconverts these products, digitizes them, and then uses them to cancel corruptive IM3 products in the digital baseband portion of a nominally linear receiver path. The combined implemented receiver represents a SAW-less direct-conversion receiver for UMTS FDD Region 1 that achieves an uncorrected out-of-band IIP3 of -7.1dBm under worst-case blocking specifications. Under IM3 equalization, the receiver achieves an effective IIP3 of +5.3dBm and meets the UMTS BER sensitivity requirements with 3.7dB of margin. To enable this mixed-signal feedforward path, a multistage cubic term generator is introduced which uses cascaded nonlinear operations to generate reference IM3 products. The multistage nature of this circuit is considered in the context of the aforementioned linearization scheme and is shown to provide sufficient dynamic range for nearly complete IM3 cancellation while dissipating far less power than the original receiver front end. In particular, the effect of the group delay between stages is analyzed and shown to permit large IM3 cancellation ratios for interstage group delays less than 1ns.
Expanding upon the first effective linearization approach led to the development of a large signal handling receiver with an out-of-band 1-dB desensitization point of +12.5dBm. Enabling this large signal handling capability is a passive mixer downconverter preceded by a novel wide-swing LNTA. With a stacked push-pull class-AB common-gate architecture, the LNTA reduces the magnitude of input-referred distortion by up to 40dB beyond that predicted by an initial slope-of-3 characteristic while at the same time minimally impacting the effective small-signal gain of the receiver. To compensate for intermodulation distortion terms of order greater than 3, IM3 and IM2 products are processed down to digital baseband where they are successively multiplied to generate approximations to higher-order terms. In the case of a +12.4dBm QPSK-modulated signal and a -16.3dBm CW blocker, cancellation improves receiver input-referred error by over 24dB, resulting in an extrapolated IIP3 of +43.5dBm.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/FZ1R-MJ30, author = {Wang, Yu-Jiu}, title = {Circuits and Systems for Wireless Concurrent Communication}, school = {California Institute of Technology}, year = {2009}, doi = {10.7907/FZ1R-MJ30}, url = {https://resolver.caltech.edu/CaltechETD:etd-03292009-070752}, abstract = {Concurrency is a special kind of analog circuit parallelism that uses a single circuit with necessary bandwidth to process multiple signals at the same time. Concurrent radios offer a higher data rate and improved system diversity. Our comprehensive treatment comprises proposals for potential transceiver architectures, invention of circuit blocks, and provisions of innovative analysis methods.
The analysis of concurrent circuits are often complex. To simplify noise analysis, a R(N2 )-vector space is first proposed to re-formulate the N-port network noise modeling problem. Any internal physical source inside the noisy network contributes a small vector in the defined R(N2)-vector space, and the aggregate statistical behavior of this noisy network can be viewed as the vector sum of these vectors. Applying this concept to FET noise modeling leads to several modified FET noise models, in which three uncorrelated noise sources are sufficient to describe the statistical behavior of an intrinsic FET. The use of these new FET models can simplify the analysis, simulation, and optimization of low noise systems without sacrificing accuracy.
Broadband low-noise amplifier is a critical block in concurrent receiver systems. We propose a novel low-noise weighted distributed amplifier (WDA) topology, which uses the internal finite-impulse-response filtering inside a conventional distributed amplifier to partially suppress internal thermal noise. A distinct advantage of this topology is its tolerance to input parasitic capacitance which can be used to provide good electro-static discharge (ESD) protection without sacrificing its noise performance and power consumption. A compact 3.1─10.6 GHz WDA IC is built on a 130 nm CMOS process. Experimental results show 2.3─4.5 dB NF at 23 mW power consumption.
Using concurrency in wireless link can boost communication data rate. As a proof-of concept, we propose dynamically scalable concurrent communication by dividing the 7.5 GHz bandwidth of the unlicensed 3.1─10.6 GHz spectrum into seven concurrent channels. A CMOS octa-core RF receiver is implemented to validate the idea. Based on the receiver measurement results, a wireless link can be built to achieve a 16 Gbps channel limit at five meter TX-RX distance at 400 mW power consumption.
Tunable concurrency can improve the receiver diversity. A prototype 6─18 GHz concurrent tunable dual-band phased array receiver element IC is proposed and built on a 130 nm CMOS process. Experimental results demonstrate successful dual-band RF reception within a low band (6─10.4 GHz) and high band (10.4─18 GHz) with 300 MHz baseband bandwidth. A final four-element phased array receiver built from the prototyped ICs shows an array pattern with worst-case 21 dB peak-to-null ratio across all frequencies.
Concurrency can also be used to achieve multi-beam reception by providing multiple phase-shifts for each RF signals and combining them separately at baseband outputs. A 10.4─18 GHz concurrent dual-beam phased array receiver is proposed based on this concept, and is implemented on a 130 nm CMOS process. A final four-element phased array system shows successful concurrent dual-beam reception at the same RF frequency.
Yu-Jiu Wang (209
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/T4EC-TX97, author = {Wang, Hua}, title = {Precision Frequency and Phase Synthesis Techniques in Integrated Circuits for Biosensing, Communication and Radar}, school = {California Institute of Technology}, year = {2009}, doi = {10.7907/T4EC-TX97}, url = {https://resolver.caltech.edu/CaltechETD:etd-06102009-164232}, abstract = {Today’s CMOS technology provides circuit designers with a powerful implementation platform that supports innovation opportunities on both circuit-topology and system-architecture levels. Moreover, the versatility of CMOS implementation opens the door for a plethora of challenging and exciting interdisciplinary research.
This dissertation focuses on investigating novel techniques and applications for precision frequency and phase synthesis in CMOS. It consists of two parts: a CMOS compatible molecular-level biosensor and a multiple-beam/multi-band scalable CMOS phased array receiver system.
In the first part, a frequency shift based magnetic biosensing scheme is introduced to address the Point-of-Care (PoC) biomolecular diagnosis for high-sensitivity, portable and cost low applications. Compared with existing biosensing schemes, the proposed scheme achieves a competitive sensitivity without using optical devices, external biasing fields or expensive post-processing steps. A discrete implementation first verifies the sensing mechanism and reveals several design insights. An integrated implementation based on standard 130nm CMOS process is then designed with differential sensing and temperature controlling schemes. Overall, with a differential uncertainty of 0.13ppm for relative frequency shift, the sensor achieves reliable detection of one single micron-size magnetic particle (D=4.5um, 2.4um and 1um) as well as 1n-Molar real DNA samples labeled by magnetic nanoparticles (D=50nm).
In the second part, a high-resolution compensation technique is proposed to address mismatch and offset issues encountered by practical phased array system. It employs a dense Cartesian interpolation scheme with an easily scalable architecture and a wide operation bandwidth. As an implementation example, a 6-to-18GHz dual-band quad-beam phased array CMOS receiver is presented, which is capable of forming four spatially independent beams at two different frequencies across the tritave bandwidth. With the mismatch compensation, the array element has achieved a maximum RMS phase error of 0.5˚ with an RMS amplitude variation less than 1.5dB for the 360˚ interpolation over the full operation bandwidth. For a 4-element phased array receiver system based on the designed CMOS chip, the electrical array pattern is measured at 6GHz, 10.4GHz and 18GHz, with the worst case peak-to-null ratio of 21.5dB. In addition, a broadband inductorless design methodology based on Cherry-Hooper topology is proposed for chip area saving. As implementation examples, we will show a DC-19GHz 10dB gain broadband buffer amplifier, a DC-12GHz broadband phase rotator with 10-bit resolution and a beam-forming network in a 10.4GHz to 18GHz phased array receiver chip with dual-beam capability.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/BS6T-1S20, author = {Babakhani, Aydin}, title = {Direct Antenna Modulation (DAM) for On-Chip mm-Wave Transceivers}, school = {California Institute of Technology}, year = {2008}, doi = {10.7907/BS6T-1S20}, url = {https://resolver.caltech.edu/CaltechETD:etd-06082008-174204}, abstract = {In the last few decades the puissant desire to miniaturize the digital circuits to achieve higher speed and larger density has shaped the evolution of the silicon-based technologies. This development opens a new era in the field of millimeter-wave electronics in which many low-cost high-yield silicon-based transistors can be used on a single chip to enable creation of novel architectures with unique properties not achievable with old processes. In addition to this high level of integration capability, the die size of comparable or even larger than the wave-length makes it possible to integrate antennas, transceivers, and digital circuitry all on a single silicon die.
It is important to realize that although smaller parasitic capacitors and shorter transistor channels have improved fT and fmax of transistors, extremely thin metal layers, highly doped substrates, and low breakdown voltage transistors have severely affected the performance of analog and RF building blocks. For example, thin metal layers have increased the loss and lowered the quality factor of the building blocks such as capacitors and inductors and low breakdown voltage transistors have made the power generation quite challenging. Additionally, if not carefully designed, small wave-lengths in the millimeter-wave range may cause unintended radiation by on-chip components. In this dissertation, we address these issues in design of millimeter-wave silicon-based single-chip phased-array transceivers with integrated antennas. We also introduce the technique of Direct Antenna Modulation (DAM) and implement two proof-of-concept chips operating at 60 GHz.
We will present the receiver and the on-chip antenna sections of a fully integrated 77 GHz four-element phased-array transceiver with on-chip antennas in silicon. The receiver section of the chip includes the complete down-conversion path comprising low-noise amplifier (LNA), frequency synthesizer, phase rotators, combining amplifiers, and on-chip dipole antennas. The signal combining is performed using a novel distributed active combining amplifier at an IF of 26 GHz. In the LO path, the output of the 52 GHz VCO is routed to different elements and can be phase shifted locally by the phase rotators. A silicon lens on the backside is used to reduce the loss due to the surface-wave power of the silicon substrate. Our measurements show a single-element LNA gain of 23 dB and a noise figure of 6.0 dB. Each of the four receive paths has a gain of 37 dB and a noise figure of 8.0 dB. Each on-chip antenna has a gain of +8 dBi.
A direct antenna modulation (DAM) technique is also introduced, where the radiated far-field signal is modulated by time-varying changes in the antenna near-field electromagnetic (EM) boundary conditions. This enables the transmitter to send data in a direction-dependent fashion producing a secure communication link. The transmitter architecture makes it possible to use narrow-band highly-efficient switching power amplifiers to transmit wideband constant and non-constant envelope modulated signals. Theoretically, these systems are capable of transmitting independent data in multiple directions at full-rate concurrently using a single transmitter. Direct antenna modulation (DAM) can be performed by using either switches or varactors. Two proof-of-concept DAM transmitters operating at 60GHz using switches and varactors are demonstrated in silicon proving the feasibility of this approach.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/EW67-RX66, author = {Komijani, Abbas}, title = {Microwave Integrated Phased-Array Transmitters in Silicon}, school = {California Institute of Technology}, year = {2007}, doi = {10.7907/EW67-RX66}, url = {https://resolver.caltech.edu/CaltechETD:etd-05282007-203227}, abstract = {Phased-array systems, a special case of multiple-input-multiple-output (MIMO) systems, take advantage of spatial directivity and array gain to increase spectral efficiency. Implementing a phased-array system at high frequency in a commercial silicon process technology presents several challenges. This thesis focuses on the architectural and circuit-level trade-offs involved in the design of the silicon-based fully integrated phased-array transmitters.
As the first implementation, a four-element 24GHz 0.18µm CMOS phased-array transmitter with integrated power amplifiers is presented. On-chip power amplifiers use substrate-shielded slow-wave transmission lines for impedance matching and can generate up to 14dBm of output power. The transmitter employs a two-step upconversion architecture with 4.8GHz as the intermediate frequency (IF) and uses a single 19.2GHz synthesizer serving as the local oscillator (LO) generator. The phased-array, employing the LO phase shifting architecture, achieves 23dB of peak to null-ratio when all four elements are used, demonstrates a beam steering range covering all signal incident angles, and can support a data rate of 500Mbps with a quadrature phase-shift keying (QPSK) baseband signal.
As the second implementation with a modified phase shifting architecture, an integrated 4-element 77GHz Silicon-Germanium (SiGe) phased-array transceiver is presented. Two-step conversion, envisioning a dual-mode 77GHz/24GHz operation, is used at both the receiver and the transmitter paths. A differential phase of 52GHz is generated by the on-chip voltage-controlled oscillator (VCO) and is distributed to all radio frequency (RF) paths. The phase shifting is performed at the LO ports of the RF mixers with continuous analog phase shifters. The quadrature signal of the second LO, at the IF frequency of 26GHz, is generated by dividing the VCO frequency by a factor of 2 using a cross-coupled injection-locked frequency divider. The on-chip 77GHz power amplifier with an output power of 17.5dBm and peak power added efficiency (PAE) of 14% achieves the best performance demonstrated in silicon. A single transmitter path achieves a 40dB conversion gain at 77GHz with 2.5GHz of bandwidth and a maximum output power of 12.5 dBm.
The measured results demonstrate the feasibility of using silicon-based integrated phased-arrays for wireless communication and vehicular radar applications.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/SGZC-FD54, author = {Natarajan, Arun Sridhar}, title = {Millimeter-Wave Phased Arrays in Silicon}, school = {California Institute of Technology}, year = {2007}, doi = {10.7907/SGZC-FD54}, url = {https://resolver.caltech.edu/CaltechETD:etd-06012007-130844}, abstract = {Integration of mm-wave multiple-antenna systems on silicon-based processes enables complex, low-cost systems for high-frequency communication and sensing applications. While individual silicon devices struggle to achieve the same performance as III-V semiconductor-based transistors at mm-wave frequencies, the benefits of integration, such as good component matching and near-zero incremental device cost, can be leveraged to achieve good system performance. This dissertation presents different techniques and architectures for integrating mm-wave phased arrays on commercial silicon process technologies by demonstrating phased-array transmitters and receivers at 24GHz, 60GHz, and 77GHz, in CMOS and SiGe BiCMOS processes.
Initially, the tradeoffs of high-frequency systems are discussed in the context of Shannon capacity and the benefits of integrating phased arrays at such high frequencies are discussed in detail. An analysis of the output noise in a phased-array receiver in the presence of antenna coupling and input noise correlation is carried out and measurements on a discrete two-element array demonstrate the dependence of output noise on the phase-shift setting.
The design of the first fully-integrated 24GHz phased-array transmitter using mainly 0.18[mu]m CMOS transistors is described. The four-element array adopts a centralized LO-path phase-shifting approach using a multi-phase VCO. The on-chip 19.2GHz VCO generates 16 equally spaced LO phases leading to 7 degree beam resolution for radiation normal to the array. The transmitter includes four on-chip CMOS power amplifiers, with outputs matched to 50 Ohms, that are each capable of generating up to 14.5dBm of output power at 24GHz. The array achieves a peak-to-null ratio of 23dB with four elements active and can support data rates of 500Mb/s on each channel (with BPSK modulation) while occupying 6.8mm x 2.1mm of die area.
A high-resolution local LO-path phase-shifting architecture is presented as part of the first fully-integrated 77GHz phased-array transceiver in a SiGe BiCMOS process. The SiGe transceiver includes four transmit and four receive elements (including 77GHz LNA and PA), along with the LO frequency generation and distribution circuitry. The local LO-path phase-shifting scheme enables a robust distribution network that scales well with increasing frequency and/or number of elements, while providing high-resolution phase shifts. Each transmit element of the heterodyne transmitter generates +12.5dBm of output power at 77GHz, with a bandwidth of 2.5GHz leading to a four-element EIRP of 24.5dBm. Each on-chip PA has a maximum saturated power of +17.5dBm at 77GHz while the on-chip VCO achieves a phase noise of -95dBc/Hz@1MHz offset at 54GHz. The phased-array performance is measured using an internal test option and achieves 12dB peak-to-null ratio with two transmit and receive elements active.
While the 24GHz and 77GHz array are multiple-input single-output systems, higher-order phase-shifting and combining techniques can be used to achieve arrays with multiple outputs, with beams focused on different directions concurrently. Toward this end, a 60GHz bidirectional RF-combined phased array front-end is implemented in SiGe BiCMOS, using a hybrid parallel/series phase-shift approach that reduces the requirements of the on-chip phase shifters, enabling RF signal combining. The four-element array enables simultaneous illumination of two angles of incidence and includes amplitude control, as well as continuous phase adjustment. The front-end has a noise figure lower than 6.9dB at 60GHz and the array achieves full spatial coverage with peak-to-null ratio higher than 25dB. The four-element front-end consumes 265mW and occupies 4.6mm2 of die area.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/Z95M63XK, author = {Afshari, Ehsan}, title = {Optotronics: Optically Inspired Electronics}, school = {California Institute of Technology}, year = {2007}, doi = {10.7907/Z95M63XK}, url = {https://resolver.caltech.edu/CaltechETD:etd-08042006-144107}, abstract = {Waves are everywhere, from the distribution of cars on a highway to the wave patterns in the ocean. Intriguing phenomena in wave propagation, such as Soliton resonance, kink-antikink interaction, self-focusing, and Peakon generation can be used in many practical applications leading to novel architectures for signal processing and generation. These E/M based approaches could be particularly useful in the case of Extremely Wide Band (EWB) (DC to more than 100GHz) circuits and systems where the limited transistor cut-off frequency, maximum power efficiency, and breakdown voltage pose serious constraints on the use of conventional circuit techniques.
To overcome the limitations of active devices in EWB signal processing and generation, we propose a general class of solutions based on novel circuit topologies inspired by commonly used structures in electromagnetics, and more specifically optics. The proposed methodology is based on nonlinear and/or inhomogeneous one-dimensional (1D) transmission lines which we have successfully extended to two-dimensional transmission lattices. The principles behind these designs stem from the mathematical theory of linear and nonlinear wave propagation. By analyzing the models for the transmission lines/lattices, we are able to exploit the large body of theory to design circuits, demonstrating the narrowest reported pulse on silicon (2.5ps), and for a single integrated-circuit silicon-based amplifier, the highest achieved center frequency of operation (85GHz) and the highest achieved power output (120mW) at this frequency. In addition, we have reported the first in-silicon transmission line system capable of sharpening both rising and falling edges of NRZ data by increasing the bandwidth. In the end, we will also present how the same approach can be applied to realize ultra-fast computation systems (such as a sub-nanosecond Fourier and Hankel transformers in silicon) and other structures, leading to a new design discipline we like to call “Optotronics”.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/EGRD-TZ84, author = {Buckwalter, James Franklin}, title = {Deterministic Jitter in Broadband Communication}, school = {California Institute of Technology}, year = {2006}, doi = {10.7907/EGRD-TZ84}, url = {https://resolver.caltech.edu/CaltechETD:etd-01302006-154842}, abstract = {
The past decade has witnessed a drastic change in the design of high-speed serial links. While Silicon fabrication technology has produced smaller, faster transistors, transmission line interconnects between chips and through backplanes have not substantially improved and have a practical bandwidth of around 3GHz. As serial link speeds increase, new techniques must be introduced to overcome the bandwidth limitation and maintain digital signal integrity. This thesis studies timing issues pertaining to bandwidth-limited interconnects. Jitter is defined as the timing uncertainty at a threshold used to detect the digital signal. Reliable digital communication requires minimizing jitter.
The analysis and modeling presented here focuses on two types of deterministic jitter. First, dispersion of the digital signal in a bandwidth-limited channel creates data-dependent jitter. Our analysis links data sequences to unique timing deviations through the channel response and is shown for general linear time-invariant systems. A Markov model is constructed to study the impact of jitter on the operation of the serial link and provide insight in circuit performance. Second, an analysis of bounded-uncorrected jitter resulting from crosstalk induced in parallel serial links is presented.
Timing equalization is introduced to improve the signal integrity of high-speed links. The analysis of deterministic jitter leads to novel techniques for compensating the timing ambiguity in the received data. Data-dependent jitter equalization is discussed at both the receiver, where it complements the operation of clock and data recovery circuits, and as a phase pre-emphasis technique. Crosstalk-induced, bounded-uncorrected jitter can also be compensated. By detecting electromagnetic modes between neighboring serial links, a transmitter or receiver anticipates the timing deviation that has occurred along the transmission line.
Finally, we discuss a new circuit technique for submillimeter integrated circuits. Demands of wireless communication and the high speed of Silicon Germanium transistors provide opportunities for unique radio architectures for submillimeter integrated circuits. Scalable, fully-integrated phased arrays control a radiated beam pattern electronically through tiling multiple chips. Coupled-oscillator arrays are used for the first time to subharmonically injection-lock across a chip or between multiple chips to provide phase coherence across an array.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/E5GE-EP91, author = {Guan, Xiang}, title = {Microwave Integrated Phased Array Receivers in Silicon}, school = {California Institute of Technology}, year = {2006}, doi = {10.7907/E5GE-EP91}, url = {https://resolver.caltech.edu/CaltechETD:etd-09302005-024349}, abstract = {Microwave integrated systems in silicon provide a low cost, low power and high yield solution for wideband data communication, radar, and many other applications. Phased-array systems are capable of steering the radiation beam by electronic means, emulating the behavior of a directional antenna. This dissertation is dedicated to presenting various techniques to implement microwave integrated phased-array receivers in silicon-based technologies in the context of three design examples.
A 24-GHz 0.18-µm complementary metal oxide semiconductor (CMOS) front-end was demonstrated. The front-end consists of a low noise amplifier (LNA) and a mixer. The LNA utilizes a novel topology common-gate with resistive feedthrough to obtain low-noise performance. The entire front-end achieves a 7.7dB noise figure and a 27.5dB power gain.
A fully integrated 8-element 24-GHz silicon germanium (SiGe) phased array receiver was implemented. The receiver uses two-step downconversion and local oscillator (LO) phase shifting with 4-bit resolution. The signal is combined at the 4.8-GHz intermediate frequency. The 16 phases of 19.2-GHz LO signal are generated with a voltage controlled oscillator (VCO) and symmetrically distributed to the phase selectors at all path. Appropriate phase sequence is applied to the phase distribution transmission lines to minimize mismatch. An integrated frequency synthesizer locks the 19.2-GHz VCO output to a 75-MHz external reference. Measured array patterns show a peak-to-null ratio of more than 20dB and a beam steering range covering all signal incident angles.
An integrated 4-element 77-GHz SiGe wideband phased-array transceiver was implemented. Two-step conversion is used at both the receiver and the transmitter. A differential phase of 52 GHz is generated by the VCO and distributed to all RF paths at the transmitter and receiver. The phase shifting is performed at the LO ports of the RF mixers using continuous analog phase shifters. The quadrature signal of the second LO frequency is generated by dividing the VCO frequency by a factor of 2 using a cross-coupled injection-locked frequency divider. The signal combining is performed at IF with an active combining amplifier. The receiver achieves a 41dB gain at 80 GHz with 3 GHz of bandwidth. The 52-GHz-to-50MHz frequency divider chain obtains 7% locking range.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/GGMB-0J23, author = {Analui, Behnam}, title = {Signal Integrity Issues in High-Speed Wireline Links: Analysis and Integrated System Solutions}, school = {California Institute of Technology}, year = {2006}, doi = {10.7907/GGMB-0J23}, url = {https://resolver.caltech.edu/CaltechETD:etd-08092005-100809}, abstract = {This work focuses on the basic signal integrity issues of high-speed wireline links. It bridges the gap between optimum system design and circuit design for such links by: (1) understanding the effects of the system parameters on the bit error rate (BER), (2) introducing circuit architectures for the realization of systems that minimize the BER, and (3) demonstrating integrated circuit prototypes that verify the solutions.
First, we develop a theory that analytically relates the data link BER to the system characteristics, e.g., the channel response, the pre-amplifier bandwidth, and the transmitter clock jitter. We generate the BER contours to find the optimum receiver bandwidth as well as the optimum sampling point and its associated timing margin. We also develop the theory of the data-dependent jitter (DDJ), which is a significant component of the timing jitter in high-speed links. We provide an analytical distribution function for the DDJ of an arbitrary linear time-invariant system and include the impact of the DDJ on the BER.
Second, we propose a bandwidth enhancement method for wideband amplifiers. This is useful for the realization of high-speed links in technologies that suffer from large parasitic components. The method leverages two-port broadband matching to enable amplifier stages to achieve their maximum gain-bandwidth product. We demonstrate a 10Gb/s CMOS 0.18um amplifier with this technique that has 2.4 times the bandwidth improvement over a design that does not apply the technique.
Third, we develop an eye-opening monitor (EOM) that enables full integration of adaptive equalizers. The EOM evaluates the signal eye diagram quality and reports a quantitative measure, which is correlated to the signal integrity. We demonstrate a prototype in 0.13um standard CMOS that operates up to 12.5Gb/s and has 68dB error dynamic range.
Finally, we introduce an instantaneous clockless demultiplexer for burst-mode communication applications. We propose a clockless finite state machine that recovers and demultiplexes the received burst of data instantaneously. The architecture consists of a combinational logic structure and a bit-period-delayed feedback loop. We demonstrate a 1:2 clockless demultiplexer based on this concept in SiGe BiCMOS technology that operates at 7.5Gb/s.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/ATKE-YX40, author = {White, Christopher John}, title = {A Solid-state Atomic Frequency Standard}, school = {California Institute of Technology}, year = {2005}, doi = {10.7907/ATKE-YX40}, url = {https://resolver.caltech.edu/CaltechETD:etd-05242005-172142}, abstract = {The thesis describes a new class of frequency reference. The frequency source uses the same operating principle as a passive atomic frequency standard; however, the device is entirely solid-state, removing many cost and reliability issues associated with gas-phase atomic clocks. More specifically, the “atomic resonance” is derived from zero-field magnetic resonance transitions of the vanadium ion in a cubic crystal lattice. The characteristics of these resonances will be described in detail. The apparatus for measuring the “atomic” resonances uses a radio-frequency resonant cavity and frequency discriminator circuit. Using integrated circuits, the radio-frequency signal processing functions can be implemented at very low cost in a reliable manufacturing process. We discuss the system design and the measurement sensitivity. Advantages of the new frequency reference may include immunity to vibration and reduced aging compared to crystal oscillators.}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/6F03-MP11, author = {Mukhtar, Saleem}, title = {Interval Modulation: A New Paradigm for the Design of High Speed Communication Systems}, school = {California Institute of Technology}, year = {2005}, doi = {10.7907/6F03-MP11}, url = {https://resolver.caltech.edu/CaltechETD:etd-07072004-154316}, abstract = {In this thesis we propose a new, biologically inspired, paradigm for the design of high speed communication systems. The paradigm consists of a new modulation format referred to as Interval Modulation (IM). In order to transmit data in an efficient manner using this format, new coding techniques are needed. In this thesis we propose a coding technique based on variable length to variable length prefix trees and code construction algorithms are outlined. These codes are referred to as Interval Modulation Codes (IMC). Furthermore, data encoded with this modulation format cannot be transmitted or received using conventional synchronous CDR based receivers. In this thesis we outline a new asynchronous circuit architecture for both the transmitter and receiver. The architecture is based on active delay lines and eliminates the need for clock recovery.}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali and Bruck, Jehoshua and Sternberg, Paul W.}, } @phdthesis{10.7907/S2EP-3A93, author = {Aparicio Joo, Roberto}, title = {Frequency Generation Techniques for Integrated Applications}, school = {California Institute of Technology}, year = {2004}, doi = {10.7907/S2EP-3A93}, url = {https://resolver.caltech.edu/CaltechETD:etd-06052004-180113}, abstract = {This thesis presents novel oscillator topologies and passive structures that demonstrate improvements in performance compared to existing devices in CMOS. The contributions of this work include the development of original topologies and concepts together with practical implications in the area of integrated frequency generation.
A noise-shifting differential Colpitts oscillator topology is proposed. It is less sensitive to noise generated by the active devices than commonly used integrated oscillator topologies such as NMOS- or PMOS-only, and complementary cross-coupled. This is achieved through cyclostationary noise alignment while providing a fully differential output and large loop gain for reliable start up. An optimization strategy is derived for this oscillator that is used in the implementation of a CMOS prototype. The performance of this oscillator is compared to traditional topologies and previously published integrated oscillators achieving lower phase noise and some of the highest figures of merit, respectively.
A new circular-geometry oscillator topology is introduced. It allows the implementation of slab inductors for high-frequency and low-phase noise oscillator applications. Slab inductors present an attractive alternative for monolitic applications where low loss, low impedance, and high self-resonance integrated inductors are required. A general methodology to ensure the proper oscillation mode when several oscillator cores are coupled in a circular-geometry as well as to achieve a stable dc bias point is offered. Several circular-geometry CMOS integrated oscillator prototypes are presented as a proof of concept and their performances are compared to previously published high frequency oscillators achieving some of the best figures of merit.
Theoretical limits for the capacitance density of integrated capacitors with combined lateral and vertical field components are derived. These limits are used to investigate the efficiency of various capacitive structures such as lateral flux and quasi-fractal capacitors. This study leads to two new capacitor structures with high lateral-field efficiencies. These new capacitors demonstrate larger capacities, superior matching properties, tighter tolerances, and higher self-resonance frequencies than the standard horizontal parallel plate and previously reported lateral-field capacitors, while maintaining comparable quality factors. These superior qualities are verified by simulation and experimental results.
Finally, three phase-locked-loops (PLL) are presented. A 6.6GHz PLL for applications in a concurrent dual-band CMOS receiver is described. Careful frequency planning allows the generation of the three local oscillator signals required by the entire receiver using only one PLL, reducing power consumption and chip area considerably. The design issues of an ultra-low-power PLL prototype implemented in a sub-micron CMOS process are also discussed. The design of a low-power 3.2GHz PLL implementing a phase-compensation technique for fractional-N frequency synthesis is described. It uses an on-chip delay-locked-loop tuning scheme that attenuates the fractional spur independent of the output frequency and process variations.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/3R2B-8A25, author = {Hashemi, Hossein}, title = {Integrated Concurrent Multi-Band Radios and Multiple-Antenna Systems}, school = {California Institute of Technology}, year = {2004}, doi = {10.7907/3R2B-8A25}, url = {https://resolver.caltech.edu/CaltechETD:etd-09302003-125128}, abstract = {This thesis presents a unique view on radio systems that can simultaneously function at multiple frequency bands. These radios offer a higher data-rate and robustness in addition to the added functionality in the performance of wireless systems. Our treatment includes the definition of such novel radios, formulation of their singular characteristics, proposition for transceiver architectures, and invention of circuit blocks.
Various transceiver architectures for this new class of concurrent multi-band radios are proposed. The results for an integrated concurrent dual-band receiver operating at 2.4 GHz and 5.2 GHz frequency bands for wireless networking applications are presented. Meticulous frequency-planning results in a high level of integration and a low power design for the concurrent receiver. Several new circuit concepts including the concurrent multi-band low-noise amplifier are demonstrated in this design. A general class of these concurrent multi-band amplifiers is investigated with numerous implementations of integrated concurrent dual-band and triple-band amplifiers.
A theoretical treatment of nonlinear oscillators with multi-band resonator structures is also offered. It is shown that given certain nonlinearities these oscillators can generate multi-frequency outputs. The phase-noise of such negative-resistance oscillators with general resonator structure is addressed. By providing a link between the stored and dissipated energies of a network and its associated circuit parameters, useful interpretations of resonator quality factor are derived. With the aid of this analysis and the previously developed phase-noise models, dependencies of phase-noise on the resonator structure are derived. Based on our theoretical results, enhanced resonators with higher quality factor providing a superior oscillator phase-noise are proposed.
Finally, in order to enhance the performance of wireless systems by exploiting the spatial properties of the electromagnetic wave, multiple-antenna radios in phased-array configuration are investigated. The phased-array technology results in higher immunity to unwanted interference and therefore achieves a superior overall system capacity in a shared environment. The first fully integrated multiple-antenna receiver targeting the 24 GHz ISM band using silicon technology is presented. The phased-array radio at 24 GHz is a cheap solution for high data-rate WLAN, as well as for fixed wireless broadband access applications.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/51YY-3Y81, author = {Wu, Hui}, title = {Signal Generation and Processing in High-Frequency / High-Speed Silicon-Based Integrated Circuits}, school = {California Institute of Technology}, year = {2003}, doi = {10.7907/51YY-3Y81}, url = {https://resolver.caltech.edu/CaltechETD:etd-05302003-160130}, abstract = {High-frequency/high-speed integrated circuits become increasingly important because of the strong demand for higher data rate and lower power consumption, and they rely more on silicon-based technologies, which has the advantages of low cost, fast technological development and system-on-a-chip (SoC) capabilities. However, silicon technologies also present great challenges in high-frequency/high-speed integrated circuits. This work demonstrated that distributed circuit and injection locking are two enabling circuit techniques that can help overcome silicon limitations.
Distributed voltage-controlled oscillators (DVCO’s) demonstrated the high-frequency capabilities of distributed circuits. The operation of distributed oscillators is analyzed and the general oscillation condition is derived, resulting in analytical expressions for the oscillation frequency and amplitude. Two tuning techniques are developed, namely, the inherent-varactor tuning and delay-balanced current-steering tuning. A complete analysis of the tuning techniques is also presented. CMOS and bipolar DVCO prototypes have been designed and fabricated in a commercial 0.35µm BiCMOS process. A 10-GHz CMOS DVCO achieves a tuning range of 12% and a phase noise of -103 dBc/Hz at 600 kHz frequency offset. A 12-GHz bipolar DVCO achieves a tuning range of 26% and a phase noise of -99 dBc/Hz at 600 kHz frequency offset. New DVCO architectures are also proposed to improve the performance.
The distributed circuit technique is also used for equalization in high-speed fiber-optic systems, in which inter-symbol interference (ISI) caused by fibre dispersion imposes a major limitation. Compared to optical-domain methods and other electrical-domain methods, equalization with distributed transversal filters (DTF’s) presents the most cost-effective and SoC-compatible solution. Prototype DTF’s have been implemented in a commercial 0.18µm SiGe BiCMOS process for 10 Gpbs fiber-optic systems. A 7-tap DTF reduces the ISI of a 10 Gbps signal after 800m 50µm multi-mode fiber from 5 dB to 1.38 dB, and improves the BER from 10⁻⁵ to 10⁻¹².
The injection locking technique is applied in high-speed, low-power frequency dividers, namely, injection-locked frequency dividers (ILFD’s). Based on the detailed analysis, shunt-peaking and oscillation-suppression techniques are developed to enhance the locking range. Prototypes are implemented in a commercial 0.35µm BiCMOS process using only CMOS transistors. A 19 GHz ILFD achieves a locking range of 1350 MHz with the power consumption of 1 mW. A 9 GHz ILFD achieves a locking range of 1490 MHz with the power consumption of 1.3 mW. Self-dividing oscillators are proposed to generate accurate low-phase-noise quadrature signals.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, } @phdthesis{10.7907/tgja-7y11, author = {Ham, Donhee}, title = {Statistical Electronics: Noise Processes in Integrated Communication Systems}, school = {California Institute of Technology}, year = {2002}, doi = {10.7907/tgja-7y11}, url = {https://resolver.caltech.edu/CaltechETD:etd-03162005-141416}, abstract = {This thesis presents a comprehensive investigation of noise and thermodynamics in electronic circuits and systems. This study of “statistical electronics” spans two disciplines, statistical thermodynamics and electronic circuit engineering, and leads to a general picture that bridges electronics and statistical thermodynamics.
Our work on statistical electronics has both scientific and engineering implications. Scientifically, this work is an extensive study of statistical thermodynamics in the context of electrical circuits, which has made several significant contributions to the understanding of noise processes in electrical circuits. The technological importance is a demonstration of how the fundamental physical considerations evolve to practical high-performance novel circuit design. The power of our fundamental approach is demonstrated through several practical circuit examples.
First, our investigation of fluctuations in nonlinear electrical circuits provides deep insight into the nonlinear fluctuation phenomena. Especially, the study of fluctuations in nonlinear active devices constitutes an important sector in this investigation; verifying the physical soundness of the contemporary active device noise modeling and leading to clear understanding of fluctuation-dissipation relations in nonlinear devices.
Second, we apply statistical electronics to noise problems involved in frequency conversion, an essential function in modern RF and microwave receivers. This study leads to two novel observations of noise figure degradation due to cyclostationary noise and conversion gain enhancement, both dependent on the size of energy storing elements. This novel behavior is experimentally verified with a direct measurement of integrated switching mixers. The results provide new insight into cyclostationary noise processes in frequency conversion and optimum deisgn for switching mixers.
Third, application of statistical electronics to noise in frequency generation by self-sustained oscillators leads to a new theory of oscillator noise. This study demonstrates the direct correspondence between the phase noise and the Einstein relation; revealing the underlying physics of oscillator noise. Our approach clarifies the fluctuation-dissipation relation in oscillator noise generation, establishing a link between currently available fluctuation-based and dissipation-based phase noise. models and leading to a clear definition of loaded quality factor of ail oscillator. The novel concepts of virtual damping and linewidth compression put resonators and oscillators in a unified framework, providing immediate design optimization insight. The power of this theoretical development is demonstrated through experimental measurements of various integrated oscillators.
Our work on statistical electronics combining circuit engineering and physical science has also resulted in other useful engineering methods, such as graphical optimization, noise simulations for computer-aided design (CAD), and time-varying filter theory.
}, address = {1200 East California Boulevard, Pasadena, California 91125}, advisor = {Hajimiri, Ali}, }