<h1>Gupta, Vidyabhusan</h1>
<h2>Monograph from <a href="https://data.caltech.edu">CaltechTHESIS</a></h2>
<ul>
<li>Gupta, Vidyabhusan (1997) <a href="https://resolver.caltech.edu/CaltechETD:etd-01102008-132037">Analog VLSI for active drag reduction</a>; <a href="https://doi.org/10.7907/3zas-5z34">10.7907/3zas-5z34</a></li>
</ul>