[
    {
        "id": "authors:mv6x4-p4n12",
        "collection": "authors",
        "collection_id": "mv6x4-p4n12",
        "cite_using_url": "https://authors.library.caltech.edu/records/mv6x4-p4n12",
        "type": "conference_item",
        "title": "Holistic Co-Design of Electronics and Photonics for High-Speed Optical Interconnects in SiP and CMOS Platforms",
        "book_title": "2024 IEEE Custom Integrated Circuits Conference (CICC)",
        "author": [
            {
                "family_name": "Talkhooncheh",
                "given_name": "Arian Hashemi",
                "orcid": "0000-0001-8946-5047",
                "clpid": "Talkhooncheh-Arian-Hashemi"
            },
            {
                "family_name": "Emami",
                "given_name": "Azita",
                "orcid": "0000-0002-6945-9958",
                "clpid": "Emami-A"
            }
        ],
        "abstract": "<div class=\"abstract-text row g-0\">\n<div class=\"col-12\">\n<div class=\"u-mb-1\">\n<div>Data centers continue to demand interconnect solutions with increasingly higher bandwidth densities and improved energy efficiency, both for connections within and between data centers. Furthermore, applications such as chip-to-chip interconnects in data center switches, high-performance field programmable gate arrays (FPGAs), and graphics processing units (GPUs) call for compact form-factors, high-volume production and low-cost. Silicon Photonics (SiP)-based transceivers, when co-packaged with CMOS electronics, offer a promising avenue to meet these demands with speeds exceeding 100 Gb/s per wavelength. Additionally, they have the capability to support higher-order modulation schemes in the optical domain, such as multilevel Pulse Amplitude Modulation (PAM-N) and Multi-point Quadrature-Amplitude Modulation (QAM-N) schemes, thereby enhancing bandwidth densities. Achieving improved electro-optical bandwidth density while maintaining optimized power efficiency necessitates addressing the optical power penalty associated with photonic integrated circuits. Furthermore, the co-optimization of electronic and photonic components provides a pathway towards achieving sub-pJ/b transmission efficiency.</div>\n</div>\n</div>\n</div>",
        "doi": "10.1109/cicc60959.2024.10529057",
        "isbn": "979-8-3503-9406-1",
        "publisher": "IEEE",
        "place_of_publication": "Piscataway, NJ",
        "publication_date": "2024-04",
        "pages": "1-8"
    },
    {
        "id": "authors:1fpbq-zba19",
        "collection": "authors",
        "collection_id": "1fpbq-zba19",
        "cite_using_url": "https://authors.library.caltech.edu/records/1fpbq-zba19",
        "type": "conference_item",
        "title": "EKGNet: A 10.96\u03bcW Fully Analog Neural Network for Intra-Patient Arrhythmia Classification",
        "book_title": "2023 IEEE Biomedical Circuits and Systems Conference (BioCAS)",
        "author": [
            {
                "family_name": "Haghi",
                "given_name": "Benyamin",
                "orcid": "0000-0002-4839-7647",
                "clpid": "Haghi-Benyamin-Allahgholizadeh"
            },
            {
                "family_name": "Ma",
                "given_name": "Lin",
                "clpid": "Ma-Lin"
            },
            {
                "family_name": "Lale",
                "given_name": "Sahin",
                "orcid": "0000-0002-7191-346X",
                "clpid": "Lale-Sahin"
            },
            {
                "family_name": "Anandkumar",
                "given_name": "Anima",
                "orcid": "0000-0002-6974-6797",
                "clpid": "Anandkumar-A"
            },
            {
                "family_name": "Emami",
                "given_name": "Azita",
                "orcid": "0000-0002-6945-9958",
                "clpid": "Emami-A"
            }
        ],
        "abstract": "<div class=\"abstract-text row g-0\">\n<div class=\"col-12\">\n<div class=\"u-mb-1\">\n<div>We present an integrated approach by combining analog computing and deep learning for electrocardiogram (ECG) arrythmia classification. We propose EKGNet, a hardware-efficient and fully analog arrythmia classification architecture that achieves high accuracy with low power consumption. The proposed architecture leverages the energy efficiency of transistors operating in the subthreshold region, eliminating the need for analog-to-digital converters (ADC) and static random-access memory (SRAM). The system design includes a novel analog sequential Multiply-Accumulate (MAC) circuit that mitigates process, supply voltage, and temperature variations. Experimental evaluations on PhysionNet&rsquo;s MIT-BIH and PTB Diagnostics datasets demonstrate the effectiveness of the proposed method, achieving an average balanced accuracies of 95% and 94.25% for intra-patient arrhythmia classification and myocardial infarction (MI) classification, respectively. This innovative approach presents a promising avenue for developing low power arrythmia classification systems with enhanced accuracy and transferability in biomedical applications.</div>\n</div>\n</div>\n</div>",
        "doi": "10.1109/biocas58349.2023.10389164",
        "isbn": "979-8-3503-0026-0",
        "publisher": "IEEE",
        "place_of_publication": "Piscataway, NJ",
        "publication_date": "2023-10",
        "pages": "1-5"
    }
]