@article{https://resolver.caltech.edu/CaltechAUTHORS:20130816-103219749,
    title = "Adaptation of Current Signals with Floating-Gate Circuits",
    journal = "Analog Integrated Circuits and Signal Processing",
    url = "https://resolver.caltech.edu/CaltechAUTHORS:20130816-103219749",
    id = "record",
    issn = "0925-1030",
    doi = "10.1023/A:1013703711427",
    volume = "30"
}


@article{https://resolver.caltech.edu/CaltechAUTHORS:HASvd98,
    title = "Impact Ionization and Hot-Electron Injection Derived Consistently from Boltzmann Transport",
    journal = "VLSI Design",
    url = "https://resolver.caltech.edu/CaltechAUTHORS:HASvd98",
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    issn = "0279-2834",
    doi = "10.1155/1998/73698",
    volume = "8"
}


@inbook{https://resolver.caltech.edu/CaltechAUTHORS:20150109-144208064,
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    url = "https://resolver.caltech.edu/CaltechAUTHORS:20150109-144208064",
    id = "record",
    isbn = "9780792381587",
    doi = "10.1007/978-0-585-28001-1\_14"
}


@article{https://resolver.caltech.edu/CaltechAUTHORS:20150113-162250820,
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    journal = "IEEE Transactions on Electron Devices",
    url = "https://resolver.caltech.edu/CaltechAUTHORS:20150113-162250820",
    id = "record",
    issn = "0018-9383",
    doi = "10.1109/16.644652",
    volume = "44"
}


@article{https://resolver.caltech.edu/CaltechAUTHORS:20150127-165006071,
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    journal = "Analog Integrated Circuits and Signal Processing",
    url = "https://resolver.caltech.edu/CaltechAUTHORS:20150127-165006071",
    id = "record",
    issn = "0925-1030",
    doi = "10.1023/A:1008244314595",
    volume = "13"
}


@article{https://resolver.caltech.edu/CaltechAUTHORS:20150113-160500726,
    title = "A single-transistor silicon synapse",
    journal = "IEEE Transactions on Electron Devices",
    url = "https://resolver.caltech.edu/CaltechAUTHORS:20150113-160500726",
    id = "record",
    issn = "0018-9383",
    doi = "10.1109/16.543035",
    volume = "43"
}


@inbook{https://resolver.caltech.edu/CaltechAUTHORS:20150113-154605832,
    title = "1996 IEEE International Symposium on Circuits and Systems. ISCAS '96, Connecting the World",
    chapter = "The matching of small capacitors for analog VLSI",
    url = "https://resolver.caltech.edu/CaltechAUTHORS:20150113-154605832",
    id = "record",
    isbn = "0-7803-3073-0",
    doi = "10.1109/ISCAS.1996.539873"
}


@inbook{https://resolver.caltech.edu/CaltechAUTHORS:20150113-155800936,
    title = "1996 IEEE International Symposium on Circuits and Systems. ISCAS '96, Connecting the World",
    chapter = "An autozeroing amplifier using PFET hot-electron injection",
    url = "https://resolver.caltech.edu/CaltechAUTHORS:20150113-155800936",
    id = "record",
    isbn = "0-7803-3073-0",
    doi = "10.1109/ISCAS.1996.541599"
}


@article{https://resolver.caltech.edu/CaltechAUTHORS:20141222-163230369,
    title = "Translinear Circuits Using Subthreshold Floating-Gate MOS Transistors",
    journal = "Analog Integrated Circuits and Signal Processing",
    url = "https://resolver.caltech.edu/CaltechAUTHORS:20141222-163230369",
    id = "record",
    issn = "0925-1030",
    doi = "10.1007/BF00166412",
    volume = "9"
}


@inbook{https://resolver.caltech.edu/CaltechAUTHORS:20150113-122333554,
    title = "1995 IEEE International Symposium on Circuits and Systems. ISCAS '95",
    chapter = "Single transistor learning synapse with long term storage",
    url = "https://resolver.caltech.edu/CaltechAUTHORS:20150113-122333554",
    id = "record",
    isbn = "0-7803-2570-2",
    doi = "10.1109/ISCAS.1995.523729"
}


@inbook{https://resolver.caltech.edu/CaltechAUTHORS:20150113-151535084,
    title = "1995 IEEE International Symposium on Circuits and Systems. ISCAS '95.",
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    id = "record",
    isbn = "0-7803-2570-2",
    doi = "10.1109/ISCAS.1995.523876"
}


@inbook{https://resolver.caltech.edu/CaltechAUTHORS:20150113-150432993,
    title = "1995 IEEE International Symposium on Circuits and Systems. ISCAS '95",
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    id = "record",
    isbn = "0-7803-2570-2",
    doi = "10.1109/ISCAS.1995.523872"
}


@inbook{https://resolver.caltech.edu/CaltechAUTHORS:20150305-152221206,
    title = "Advances in Neural Information Processing Systems 7",
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    id = "record",
    isbn = "0-262-20104-6"
}


@inbook{https://resolver.caltech.edu/CaltechAUTHORS:20150305-153222850,
    title = "Advances in Neural Information Processing Systems 7",
    chapter = "Single Transistor Learning Synapses",
    url = "https://resolver.caltech.edu/CaltechAUTHORS:20150305-153222850",
    id = "record",
    isbn = "0-262-20104-6"
}