@other{https://resolver.caltech.edu/CaltechTHESIS:10072012-230900231,
    title = "An Ultra-Low-Energy, Variation-Tolerant FPGA Architecture Using Component-Specific Mapping",
    year = "2013",
    url = "https://resolver.caltech.edu/CaltechTHESIS:10072012-230900231",
    id = "record",
    doi = "10.7907/358S-CW22"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:08192012-145253489,
    title = "GRAph Parallel Actor Language: A Programming Language for Parallel Graph Algorithms",
    year = "2013",
    url = "https://resolver.caltech.edu/CaltechTHESIS:08192012-145253489",
    id = "record",
    doi = "10.7907/M3TW-7Y53"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:10262010-082537998,
    title = "SPICE²: A Spatial, Parallel Architecture for Accelerating the Spice Circuit Simulator
 ",
    year = "2011",
    url = "https://resolver.caltech.edu/CaltechTHESIS:10262010-082537998",
    id = "record",
    doi = "10.7907/QVZR-VB52"
}


@other{https://resolver.caltech.edu/CaltechTHESIS:04052010-152122284,
    title = "Algorithms and Techniques for Conquering Extreme Physical Variation in Bottom-Up Nanoscale Systems",
    year = "2010",
    url = "https://resolver.caltech.edu/CaltechTHESIS:04052010-152122284",
    id = "record",
    doi = "10.7907/BBC7-XK34"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-01242008-012650,
    title = "Reliable Integration of Terascale Systems with Nanoscale Devices",
    year = "2008",
    url = "https://resolver.caltech.edu/CaltechETD:etd-01242008-012650",
    id = "record",
    doi = "10.7907/P842-7B49"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-05312006-164103,
    title = "Time-Multiplexed FPGA Overlay Networks on Chip",
    year = "2006",
    url = "https://resolver.caltech.edu/CaltechETD:etd-05312006-164103",
    id = "record",
    doi = "10.7907/WZTS-XR26"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-05312006-164059,
    title = "Packet-Switched On-Chip FPGA Overlay Networks",
    year = "2006",
    url = "https://resolver.caltech.edu/CaltechETD:etd-05312006-164059",
    id = "record",
    doi = "10.7907/8NFZ-4Y29"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-05132005-144347,
    title = "Floating-Point Sparse Matrix-Vector Multiply for FPGAs",
    year = "2005",
    url = "https://resolver.caltech.edu/CaltechETD:etd-05132005-144347",
    id = "record",
    doi = "10.7907/FCCD-FA51"
}


@other{https://resolver.caltech.edu/CaltechETD:etd-05052005-164226,
    title = "A Greedy Algorithm for Tolerating Defective Crosspoints in NanoPLA Design",
    year = "2005",
    url = "https://resolver.caltech.edu/CaltechETD:etd-05052005-164226",
    id = "record",
    doi = "10.7907/Z5AS-8A57"
}