Computer Science Technical Reports

Graduate Alumni — Masters

Incorporating Time in the New World of Computing Systems

Poh, Hean Lee ・ Masters ・ 1987

Advisor: Unknown, Unknown

anaLOG: A Functional Simulator for VLSI Neural Systems

Lazzaro, John Paul ・ Masters ・ 1986

Advisor: Mead, Carver

Some Results on Kolmogorov-Chaitin Complexity

Schweizer, David Lawrence ・ Masters ・ 1986

Advisor: Abu-Mostafa, Yaser S.

Sequential Threshold Circuits

Platt, John Carlton ・ Masters ・ 1985

Advisor: Mead, Carver; Hopfield, John J.

Placement of Communicating Processes on Multiprocessor Networks

Steele, Craig Stanley ・ Masters ・ 1985

Advisor: Seitz, Charles L.

Hierarchy of Graph Isomorphism Testing

Chen, Wen-Chi ・ Masters ・ 1984

Advisor: Bryant, Randal E.

Towards Concurrent Arithmetic: Residue Arithmetic and VLSI

Chiang, Chao-Lin ・ Masters ・ 1984

Advisor: Johnsson, Lennart

Using Logic Programming for Compiling APL

Derby, Howard ・ Masters ・ 1984

Advisor: Unknown, Unknown

Design of the Mosaic Processor

Lutz, Christopher ・ Masters ・ 1984

Advisor: Seitz, Charles L.

The General Interconnect Problem of Integrated Circuits

Ngai, John Yee-Keung ・ Masters ・ 1984

Advisor: Seitz, Charles L.

HEX: A Hierarchical Circuit Extractor

Oyang, Yen-Jen ・ Masters ・ 1984

Advisor: Bryant, Randal E.

Supermesh

Su, Wen-King ・ Masters ・ 1984

Advisor: Seitz, Charles L.

A VLSI Combinator Reduction Engine

Athas, William C. ・ Masters ・ 1983

Advisor: Seitz, Charles L.

Hierarchical Nets: A Structured Petri Net Approach to Concurrency

Choo, Young-il ・ Masters ・ 1983

Advisor: Kajiya, James Thomas

Type Inference in a Declarationless, Object-Oriented Language

Holstege, Eric John ・ Masters ・ 1983

Advisor: Unknown, Unknown

RTsim: A Register Transfer Simulator

Lam, Jimmy Kwok-Ching ・ Masters ・ 1983

Advisor: Bryant, Randal E.

FIFO Buffering Transceiver: A Communication Chip Set for Multiprocessor Systems

Ng, Charles Hok-Bun ・ Masters ・ 1983

Advisor: Seitz, Charles L.

EARL: An Integrated Circuit Design Language

Kingsley, Christopher Hayden ・ Masters ・ 1982

Advisor: Unknown, Unknown

A Self-Timed Chip Set for Microprocessor Communication

Whiting, Douglas Lee ・ Masters ・ 1982

Advisor: Seitz, Charles L.

The Design and Implementation of a Reticle Maker for VLSI

Gray, Moshe ・ Masters ・ 1981

Advisor: Unknown, Unknown

Toward a Theorem Proving Architecture

Lien, Sheue-Ling C. ・ Masters ・ 1981

Advisor: Unknown, Unknown

From Geometry to Logic

Lin, Tzu-Mu ・ Masters ・ 1981

Advisor: Mead, Carver

REST: A Leaf Cell Design System

Mosteller, Richard Craig ・ Masters ・ 1981

Advisor: Kajiya, James Thomas

Structure, Placement and Modelling

Ségal, Richard Lawrence ・ Masters ・ 1981

Advisor: Unknown, Unknown

A Versatile Ethernet Interface

Whelan, Daniel Steven ・ Masters ・ 1981

Advisor: Kajiya, James Thomas

A Hierarchical Design Rule Checker

Whitney, Telle ・ Masters ・ 1981

Advisor: Unknown, Unknown

A VLSI Based Real-Time Hidden Surface Elimination Display System

Demetrescu, Stefan Gabriel ・ Masters ・ 1980

Advisor: Unknown, Unknown

Automated Wiring Analysis of Integrated Circuit Geometric Data

Lang, Charles Richard ・ Masters ・ 1980

Advisor: Seitz, Charles L.

A Pascal Machine Architecture Implemented in Bristle Blocks, a Prototype Silicon Computer

Seiler, Larry Dean ・ Masters ・ 1980

Advisor: Mudge, J. Craig